Patents by Inventor Donald J. Pavinski

Donald J. Pavinski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10707965
    Abstract: A device may include a substrate. The device may include a carrier mounted to the substrate. The device may include a transmitter photonic integrated circuit (PIC) mounted on the carrier. The transmitter PIC may include a plurality of lasers that generate an optical signal when a voltage or current is applied to one of the plurality of lasers. The device may include a first microelectromechanical structure (MEMS) mounted to the substrate. The first MEMS may include a first set of lenses. The device may include a planar lightwave circuit (PLC) mounted to the substrate. The PLC may be optically coupled to the plurality of lasers by the first set of lenses of the first MEMS. The device may include a second MEMS, mounted to the substrate, that may include a second set of lenses, which may be configured to optically couple the PLC to an optical fiber.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: July 7, 2020
    Assignee: Infinera Corporation
    Inventors: Timothy Butrie, Michael Reffle, Xiaofeng Han, Mehrdad Ziari, Vikrant Lal, Peter W. Evans, Fred A. Klsh, Jr., Donald J. Pavinski, Jie Tang, David Coult
  • Publication number: 20190158183
    Abstract: A device may include a substrate. The device may include a carrier mounted to the substrate. The device may include a transmitter photonic integrated circuit (PIC) mounted on the carrier. The transmitter PIC may include a plurality of lasers that generate an optical signal when a voltage or current is applied to one of the plurality of lasers. The device may include a first microelectromechanical structure (MEMS) mounted to the substrate. The first MEMS may include a first set of lenses. The device may include a planar lightwave circuit (PLC) mounted to the substrate. The PLC may be optically coupled to the plurality of lasers by the first set of lenses of the first MEMS. The device may include a second MEMS, mounted to the substrate, that may include a second set of lenses, which may be configured to optically couple the PLC to an optical fiber.
    Type: Application
    Filed: January 7, 2019
    Publication date: May 23, 2019
    Inventors: Timothy Butrie, Michael Reffle, Xiaofeng Han, Mehrdad Ziari, Vikrant Lal, Peter W. Evans, Fred A. Klsh, Donald J. Pavinski, Jie Tang, David Coult
  • Patent number: 10211925
    Abstract: A device may include a substrate. The device may include a carrier mounted to the substrate. The device may include a transmitter photonic integrated circuit (PIC) mounted on the carrier. The transmitter PIC may include a plurality of lasers that generate an optical signal when a voltage or current is applied to one of the plurality of lasers. The device may include a first microelectromechanical structure (MEMS) mounted to the substrate. The first MEMS may include a first set of lenses. The device may include a planar lightwave circuit (PLC) mounted to the substrate. The PLC may be optically coupled to the plurality of lasers by the first set of lenses of the first MEMS. The device may include a second MEMS, mounted to the substrate, that may include a second set of lenses, which may be configured to optically couple the PLC to an optical fiber.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: February 19, 2019
    Assignee: Infinera Corporation
    Inventors: Timothy Butrie, Michael Reffle, Xiaofeng Han, Mehrdad Ziari, Vikrant Lal, Peter W. Evans, Fred A. Kish, Jr., Donald J. Pavinski, Jie Tang, David Coult
  • Publication number: 20180138981
    Abstract: A device may include a substrate. The device may include a carrier mounted to the substrate. The device may include a transmitter photonic integrated circuit (PIC) mounted on the carrier. The transmitter PIC may include a plurality of lasers that generate an optical signal when a voltage or current is applied to one of the plurality of lasers. The device may include a first microelectromechanical structure (MEMS) mounted to the substrate. The first MEMS may include a first set of lenses. The device may include a planar lightwave circuit (PLC) mounted to the substrate. The PLC may be optically coupled to the plurality of lasers by the first set of lenses of the first MEMS. The device may include a second MEMS, mounted to the substrate, that may include a second set of lenses, which may be configured to optically couple the PLC to an optical fiber.
    Type: Application
    Filed: December 20, 2017
    Publication date: May 17, 2018
    Inventors: Timothy Butrie, Michael Reffle, Xiaofeng Han, Mehrdad Ziari, Vikrant Lal, Peter W. Evans, Fred A. Kish, Donald J. Pavinski, Jie Tang, David Coult
  • Patent number: 9876575
    Abstract: A device may include a substrate. The device may include a carrier mounted to the substrate. The device may include a transmitter photonic integrated circuit (PIC) mounted on the carrier. The transmitter PIC may include a plurality of lasers that generate an optical signal when a voltage or current is applied to one of the plurality of lasers. The device may include a first microelectromechanical structure (MEMS) mounted to the substrate. The first MEMS may include a first set of lenses. The device may include a planar lightwave circuit (PLC) mounted to the substrate. The PLC may be optically coupled to the plurality of lasers by the first set of lenses of the first MEMS. The device may include a second MEMS, mounted to the substrate, that may include a second set of lenses, which may be configured to optically couple the PLC to an optical fiber.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: January 23, 2018
    Assignee: Infinera Corporation
    Inventors: Timothy Butrie, Michael Reffle, Xiaofeng Han, Mehrdad Ziari, Vikrant Lal, Peter W. Evans, Fred A. Kish, Jr., Donald J. Pavinski, Jie Tang, David Coult
  • Patent number: 9389441
    Abstract: A photonic transmitter, comprises a modulator driver having a first and second output ports, a photonic integrated transmitter circuit having a modulator having a first and a second input line, and a first input port electrically coupled with the first input line and a second input port electrically coupled with the second input line, and an interconnect bridge assembly, including a first termination resistor, a second termination resistor, and a substrate. An impedance-controlled transmission structure is formed in the substrate, and has: (a) an impedance control section including a first and a second signal lines electrically insulated from one another; and (b) a transmission section including a third and a fourth signal line coupled with termination resistor. The interconnect bridge assembly transmits an impedance controlled differential electrical signal from the modulator driver to the modulator, and transmits the electrical signal from the modulator to the first and second termination resistors.
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: July 12, 2016
    Assignee: Infinera Corporation
    Inventors: David Gerald Coult, Radhakrishnan L. Nagarajan, Jiaming Zhang, Joseph Edward Riska, Donald J. Pavinski, Jr., Jie Tang, Timothy Butrie
  • Publication number: 20150318952
    Abstract: A device may include a substrate. The device may include a carrier mounted to the substrate. The device may include a transmitter photonic integrated circuit (PIC) mounted on the carrier. The transmitter PIC may include a plurality of lasers that generate an optical signal when a voltage or current is applied to one of the plurality of lasers. The device may include a first microelectromechanical structure (MEMS) mounted to the substrate. The first MEMS may include a first set of lenses. The device may include a planar lightwave circuit (PLC) mounted to the substrate. The PLC may be optically coupled to the plurality of lasers by the first set of lenses of the first MEMS. The device may include a second MEMS, mounted to the substrate, that may include a second set of lenses, which may be configured to optically couple the PLC to an optical fiber.
    Type: Application
    Filed: April 29, 2015
    Publication date: November 5, 2015
    Inventors: Timothy Butrie, Michael Reffle, Xiaofeng Han, Mehrdad Ziari, Vikrant Lal, Peter W. Evans, Fred A. Kish, JR., Donald J. Pavinski, Jie Tang, David Coult
  • Patent number: 8389978
    Abstract: Consistent with the present disclosure, a package is provided that includes a housing having a recessed portion to accommodate an integrated circuit or chip. The housing has an inner periphery that defines or delineates the recessed portion. The inner periphery may be stepped and includes first and second surfaces that are spaced vertically from one another and extend in respective parallel planes, for example, to thereby constitute first and second shelves. First bonding pads or contacts (“housing pads”) may be provided on the first surface, which may electrically connect or interconnect with first pads on the integrated circuit (“IC pads”), and second housing pads may be provided on the second surface, which can electrically connect or interconnect with second IC pads. Thus, the IC pads connect to corresponding housing pads on the inner periphery of the housing that are above and below one another.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: March 5, 2013
    Assignee: Infinera Corporation
    Inventors: Donald J. Pavinski, Jr., Renshan Zhang, Jiaming Zhang, James Stewart, Jie Tang
  • Patent number: 8373996
    Abstract: Consistent with an aspect of the present disclosure, a package is provided that has a carrier and first and second substrates provided on the carrier. Conductive traces are provided on the first substrate (upper traces) and below it (lower traces) to provide two levels of electrical connectivity to a photonic integrated circuit (PIC) provided on the second substrate. As a result, an increased number of connections can be made to the PIC in a relatively small package, while maintaining adequate spacing and line widths for each trace. In addition, the lower traces are connected to bonding pads on the surface of the first substrate and are thus provided in the same plane as the upper traces. Testing of and access to both upper and lower traces is thus simplified.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: February 12, 2013
    Assignee: Infinera Corporation
    Inventors: Donald J. Pavinski, Jr., August Spannagel, Charles H. Joyner, Peter W. Evans, Matthew Fisher, Mark J. Missey
  • Publication number: 20110204507
    Abstract: Consistent with the present disclosure, a package is provided that includes a housing having a recessed portion to accommodate an integrated circuit or chip. The housing has an inner periphery that defines or delineates the recessed portion. The inner periphery may be stepped and includes first and second surfaces that are spaced vertically from one another and extend in respective parallel planes, for example, to thereby constitute first and second shelves. First bonding pads or contacts (“housing pads”) may be provided on the first surface, which may electrically connect or interconnect with first pads on the integrated circuit (“IC pads”), and second housing pads may be provided on the second surface, which can electrically connect or interconnect with second IC pads. Thus, the IC pads connect to corresponding housing pads on the inner periphery of the housing that are above and below one another.
    Type: Application
    Filed: February 22, 2010
    Publication date: August 25, 2011
    Inventors: Donald J. Pavinski, JR., Renshan Zhang, Jiaming Zhang, James Stewart, Jie Tang
  • Publication number: 20110007486
    Abstract: Consistent with an aspect of the present disclosure, a package is provided that has a carrier and first and second substrates provided on the carrier. Conductive traces are provided on the first substrate (upper traces) and below it (lower traces) to provide two levels of electrical connectivity to a photonic integrated circuit (PIC) provided on the second substrate. As a result, an increased number of connections can be made to the PIC in a relatively small package, while maintaining adequate spacing and line widths for each trace. In addition, the lower traces are connected to bonding pads on the surface of the first substrate and are thus provided in the same plane as the upper traces. Testing of and access to both upper and lower traces is thus simplified.
    Type: Application
    Filed: July 7, 2009
    Publication date: January 13, 2011
    Inventors: Donald J. Pavinski, August Spannagel, Charles H. Joyner, Peter W. Evans, Matthew Fisher, Mark J. Missey
  • Patent number: 7519246
    Abstract: A photonic integrated circuit (PIC) chip comprising an array of modulated sources, each providing a modulated signal output at a channel wavelength different from the channel wavelength of other modulated sources and a wavelength selective combiner having an input optically coupled to received all the signal outputs from the modulated sources and provide a combined output signal on an output waveguide from the chip. The modulated sources, combiner and output waveguide are all integrated on the same chip.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: April 14, 2009
    Assignee: Infinera Corporation
    Inventors: David F. Welch, Vincent G. Dominic, Fred A. Kish, Jr., Mark J. Missey, Radhakrishnan L. Nagarajan, Atul Mathur, Frank H. Peters, Robert B. Taylor, Matthew L. Mitchell, Alan C. Nilsson, Stephen G. Grubb, Richard P. Schneider, Charles H. Joyner, Jonas Webjorn, Ting-Kuang Chiang, Robert Grencavich, Vinh D. Nguyen, Donald J. Pavinski, Jr., Marco E. Sosa
  • Patent number: 7062114
    Abstract: A photonic integrated circuit (PIC) chip with a plurality of electro-optic components formed on a major surface of the chip and a submount that includes a substrate that extends over the major surface of the chip forming an air gap between the substrate and the major surface, the substrate to support electrical leads for electrical connection to some of the electro-optic components on the chip major surface.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: June 13, 2006
    Assignee: Infinera Corporation
    Inventors: Jonas Webjorn, Robert Grencavich, Vinh D. Nguyen, Donald J. Pavinski, Jr.
  • Publication number: 20040067006
    Abstract: A photonic integrated circuit (PIC) chip comprising an array of modulated sources, each providing a modulated signal output at a channel wavelength different from the channel wavelength of other modulated sources and a wavelength selective combiner having an input optically coupled to received all the signal outputs from the modulated sources and provide a combined output signal on an output waveguide from the chip. The modulated sources, combiner and output waveguide are all integrated on the same chip.
    Type: Application
    Filed: December 11, 2002
    Publication date: April 8, 2004
    Inventors: David F. Welch, Vincent G. Dominic, Fred A. Kish, Mark J. Missey, Radhakrishnan L. Nagarajan, Atul Mathur, Frank H. Peters, Robert B. Taylor, Matthew L. Mitchell, Alan C. Nilsson, Stephen G. Grubb, Richard P. Schneider, Charles H. Joyner, Jonas Webjorn, Ting-Kuang Chiang, Robert Grencavich, Vinh D. Nguyen, Donald J. Pavinski, Marco E. Sosa