Abstract: The present invention relates to a system for providing a panoramic image that allows work to be done conveniently and all at once, from a taking picture by means of a drone to a panoramic web service, and enables real-time monitoring of work progress.

Abstract: Provided are a fluorinated compound for patterning a metal or an electrode (cathode), an organic electronic element using the same, and an electronic device thereof, wherein a fine pattern of the electrode is formed by using the fluorinated compound as a material for patterning a metal or an electrode (cathode), without using a shadow mask, and it is possible to more easily apply UDC since it is easy to manufacture a transparent display having high light transmittance.

Abstract: A memory device includes first to nth decks respectively coupled to first to nth row lines which are stacked over a substrate in a vertical direction perpendicular to a surface of the substrate, n being a positive integer, a first connection structure extending from the substrate in the vertical direction to be coupled to the first row line, even-numbered connection structures extending from the substrate in the vertical direction and respectively coupled to ends of even-numbered row lines among the second to nth row lines, and odd-numbered connection structures extending from the substrate in the vertical direction and respectively coupled to ends of odd-numbered row lines among the second to nth row lines. The even-numbered connection structures are spaced apart from the odd-numbered connection structures with the first row line and the first connection structure that are interposed between the even-numbered connection structures and the odd-numbered connection structures.

Abstract: Embodiments of the present invention relate to a semiconductor-nanoparticle-ligand complex, a preparation method therefor, a photosensitive resin composition, an optical film, an electroluminescent diode and an electronic device, and, more specifically, can provide: a semiconductor-nanoparticle-ligand complex comprising a ligand represented by chemical formula 1, and thus has excellent compatibility; an optical film with excellent efficiency; an electroluminescent diode; and an electronic device.

Abstract: The present invention relates to a polyester staple yarn for a wet non-woven fabric, and a wet non-woven fabric including the same, wherein the polyester staple yarn is manufactured by using a polymerization catalyst including a titanium-based compound. The polyester staple yarn is superb in terms of dispersibility due to the remarkably low defect formation thereof, and thus, the present invention can provide a wet non-woven fabric having excellent mechanical strength, and a manufacturing method therefor.

Abstract: A semiconductor device includes a cell active pattern including a first portion and a second portion that are spaced apart from each other; a gate structure between the first portion and the second portion of the cell active pattern; a bit-line contact on the first portion of the cell active pattern; a connection pattern on the second portion of the cell active pattern; and a cell separation pattern in contact with the bit-line contact and the connection pattern, wherein the cell separation pattern includes a first sidewall in contact with the connection pattern and a second sidewall in contact with the bit-line contact, an upper portion of the second sidewall of the cell separation pattern is in contact with the bit-line contact, and a lower portion of the second sidewall of the cell separation pattern is spaced apart from the bit-line contact.

Abstract: Embodiments of the present disclosure include methods and apparatus for depositing a plurality of layers on a large area substrate. In one embodiment, a processing chamber for plasma deposition is provided. The processing chamber includes a showerhead and a substrate support assembly. The showerhead is coupled to an RF power source and a ground and includes a plurality of perforated gas diffusion members. A plurality of plasma applicators is disposed within the showerhead, wherein one plasma applicator of the plurality of plasma applicators corresponds to one of the plurality of perforated gas diffusion members. Further, a DC bias power source is coupled to a substrate support assembly.

Abstract: Provided are a fluorinated compound for patterning a metal or an electrode (cathode), an organic electronic element using the same, and an electronic device thereof, wherein a fine pattern of the electrode is formed by using the fluorinated compound as a material for patterning a metal or an electrode (cathode), without using a shadow mask, and it is possible to more easily apply UDC since it is easy to manufacture a transparent display having high light transmittance.

Abstract: A multilayer electronic component includes a body including a dielectric layer and internal electrodes and external electrodes disposed on the body and connected to the internal electrodes, wherein the external electrodes include a first electrode layer disposed on the body and including Cu and glass, a second electrode layer disposed on the first electrode layer and including Ni and Cu, and a third electrode layer disposed on the second electrode layer and including Ni and glass.

Abstract: Disclosed is a porous structure including water-soluble chitosan; and a carboxymethyl cellulose-based compound, wherein a weight ratio of the water-soluble chitosan and the carboxymethyl cellulose-based compound is from 65:35 to 25:75, and a process for preparing the same.

Abstract: A scale inhibitor squeeze treatment is enhanced by injecting a pre-flush solution into a wellbore, where the pre-flush solution includes at least one organic carbonate solvent, such as a dialkyl carbonate and/or a cyclic carbonate. The use of an organic carbonate solvent can help prevent the pre-flush solution emulsion formation, help avoid water-blocking, and enhance scale inhibitor adsorption. The use of an organic carbonate solvent also permits the pre-flush solution to be free of water, in one non-limiting embodiment.

Abstract: The invention provides a method for treating cancer in which a level of reduced folate carrier (RFC) or folylpolyglutamate synthetase (FPGS) in cancer cells of the biopsy is determined. If the level of RFC or FPGS in the cancer cells is below a threshold value, the cancer is treated with an inhibitor of serine-hydroxymethyl-transferase (SHMT)1. If the level of RFC or FPGS in the cancer cells is above the threshold value, the cancer is treated with an inhibitor of SHMT2.

Abstract: A semiconductor memory device includes a semiconductor substrate; a device isolation layer defining an active portion in the semiconductor substrate; a bit line structure intersecting the active portion on the semiconductor substrate; a first conductive pad between the bit line structure and the active portion; a bit line contact pattern between the first conductive pad and the bit line structure; a first bit line contact spacer covering a first sidewall of the first conductive pad; and a second bit line contact spacer covering a second sidewall of the first conductive pad, wherein the first conductive pad has a flat bottom surface that is in contact with a top surface of the active portion, and a width of the first bit line contact spacer is different from a width of the second bit line contact spacer.

Abstract: Provided are a compound capable of improving luminous efficiency, stability and lifespan of an organic electronic element employing the same, an organic electronic element employing the same, and an electronic device thereof.

Abstract: Provided are a compound capable of improving the light-emitting efficiency, stability, and lifespan of an element; an organic electronic element using the same; and an electronic device thereof.

Abstract: Provided are a compound capable of improving luminous efficiency, stability and lifespan of an organic electronic element employing the same, an organic electronic element employing the same, and an electronic device thereof.

Abstract: The present disclosure relates to handling tasks in parallel. In an embodiment, a method performed by a device comprises determining a type of tasks allowed to be performed in parallel based on a configuration received from a network, and performing tasks corresponding to the type while rejecting tasks not corresponding to the type.

Abstract: Disclosed are a semiconductor memory device and a method of fabricating the same. The device includes a substrate including an active pattern with doped regions, a gate electrode crossing the active pattern between the doped regions, a bit line crossing the active pattern and being electrically connected to one of the doped regions, a spacer on a side surface of the bit line, a first contact coupled to another of the doped regions and spaced apart from the bit line with the spacer interposed therebetween, a landing pad on the first contact, and a data storing element on the landing pad. The another of the doped regions has a top surface, an upper side surface, and a curved top surface that extends from the top surface to the upper side surface. The first contact is in contact with the curved top surface and the upper side surface.

Abstract: A method and apparatus for reducing orphan blocks for a blockchain is provided. The second wireless device obtains information on a first block generated by a first wireless device. The second wireless device initiates to generate a second block based on the information. The second wireless device generates an indication informing that a generation of the second block is initiated. The second wireless device shares the generated indication among participants of the blockchain.

Abstract: A semiconductor memory device includes: a device isolation pattern provided on a substrate to provide a first active portion and a second active portion; a first storage node pad disposed on the first active portion; a second storage node pad disposed on the second active portion; a pad separation pattern disposed between the first and second storage node pads; a word line disposed in the substrate to cross the first and second active portions; a bit line disposed on the pad separation pattern and crossing the word line; a buffer layer disposed on the pad separation pattern; and a mask polysilicon pattern interposed between the buffer layer and the bit line, wherein a side surface of the mask polysilicon pattern is substantially aligned to a side surface of the bit line, and the mask polysilicon pattern is vertically overlapped with the pad separation pattern.