Patents by Inventor Dong-Seok Bae

Dong-Seok Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10969677
    Abstract: The present application relates to a film mask including: a transparent substrate; a darkened light-shielding pattern layer provided on the transparent substrate; and a release force enhancement layer provided on the darkened light-shielding pattern layer and having surface energy of 30 dynes/cm or less, a method for manufacturing the same, and a method for forming a pattern using the film mask.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: April 6, 2021
    Assignee: LG CHEM, LTD.
    Inventors: Ji Young Hwang, Han Min Seo, Nam Seok Bae, Seung Heon Lee, Dong Hyun Oh, Chan Hyoung Park, Ki-Hwan Kim, Ilha Lee
  • Patent number: 10969686
    Abstract: The present application relates to a film mask comprising: a transparent substrate; a darkened light-shielding pattern layer provided on the transparent substrate; and groove portions provided in a region where the darkened light-shielding pattern layer is not provided, a method for manufacturing the same, a method for forming a pattern by using the same, and a pattern manufactured by using the same.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: April 6, 2021
    Assignee: LG CHEM, LTD.
    Inventors: Ji Young Hwang, Han Min Seo, Sangcholl Han, Seung Heon Lee, Dong Hyun Oh, Dae Han Seo, Nam Seok Bae, Min Soo Song
  • Publication number: 20210091232
    Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
    Type: Application
    Filed: November 20, 2020
    Publication date: March 25, 2021
    Inventors: Jung Gil Yang, Woo Seok Park, Dong Chan Suh, Seung Min Song, Geum Jong Bae, Dong Il Bae
  • Patent number: 10923476
    Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: February 16, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jung-Gil Yang, Geum-Jong Bae, Dong-Il Bae, Seung-Min Song, Woo-Seok Park
  • Publication number: 20210028173
    Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.
    Type: Application
    Filed: September 30, 2020
    Publication date: January 28, 2021
    Inventors: JUNG-GIL YANG, GEUM-JONG BAE, DONG-IL BAE, SEUNG-MIN SONG, WOO-SEOK PARK
  • Patent number: 10872983
    Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: December 22, 2020
    Inventors: Jung Gil Yang, Woo Seok Park, Dong Chan Suh, Seung Min Song, Geum Jong Bae, Dong Il Bae
  • Publication number: 20200388678
    Abstract: Provided is a semiconductor device comprising an active region on a substrate and including first and second sidewalls extending in a first direction and an epitaxial pattern on the active region, wherein the epitaxial pattern includes first and second epitaxial sidewalls extending from the first and second sidewalls, respectively, the first epitaxial sidewall includes a first epitaxial lower sidewall, a first epitaxial upper sidewall, and a first epitaxial connecting sidewall connecting the first epitaxial lower sidewall and the first epitaxial upper sidewall, the second epitaxial sidewall includes a second epitaxial lower sidewall, a second epitaxial upper sidewall, and a second epitaxial connecting sidewall connecting the second epitaxial lower sidewall and the second epitaxial upper sidewall, a distance between the first and second epitaxial upper sidewalls decreases away from the active region, and the first and second epitaxial lower sidewalls extend in parallel to a top surface of the substrate.
    Type: Application
    Filed: January 24, 2020
    Publication date: December 10, 2020
    Inventors: Jung Gil YANG, Seung Min SONG, Soo Jin JEONG, Dong Il BAE, Bong Seok SUH
  • Publication number: 20200381514
    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.
    Type: Application
    Filed: August 18, 2020
    Publication date: December 3, 2020
    Inventors: Seung-Min SONG, Woo-Seok PARK, Jung-Gil YANG, Geum-Jong BAE, Dong-Il Bae
  • Publication number: 20200373402
    Abstract: A semiconductor device having a gate-all-around structure includes a first fin pattern and a second fin pattern separated by a first trench and extending in a first direction, a first nanosheet on the first fin pattern, a second nanosheet on the second fin pattern, a first fin liner extending along at least a portion of a sidewall and a bottom surface of the first trench, a first field insulation layer disposed on the first fin liner and filling a portion of the first trench, and a first gate structure overlapping an end portion of the first fin pattern and including a first gate spacer. A height from the bottom surface of the first trench to a lower surface of the first gate spacer is greater than a height from the bottom surface of the first trench to an upper surface of the first field insulation layer.
    Type: Application
    Filed: January 2, 2020
    Publication date: November 26, 2020
    Inventors: Jung Gil YANG, Seung Min SONG, Soo Jin JEONG, Dong Il BAE, Bong Seok SUH
  • Patent number: 10847092
    Abstract: In a method of operating an organic light emitting display device including a plurality of pixels, an initialization voltage is applied to the plurality of pixels to store the initialization voltage in the plurality of pixels in a first period of an initial period. Driving transistors of the plurality of pixels are concurrently turned on based on the stored initialization voltage in a second period of the initial period, and a plurality of data voltages are sequentially applied to the plurality of pixels on a row-by-row basis to store the plurality of data voltages in the plurality of pixels in a data write period. The plurality of pixels concurrently emit light based on the plurality of data voltages in an emission period.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: November 24, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min-Seok Bae, Dong Won Lee
  • Patent number: 10815368
    Abstract: A thermoplastic resin composition and a molded article formed of the same. The thermoplastic resin composition includes: a thermoplastic resin including a rubber-modified vinyl graft copolymer and an aromatic vinyl copolymer resin; polyalkylene glycol; and zinc oxide, wherein the zinc oxide has an average particle diameter of about 0.5 ?m to about 3 ?m and a BET specific surface area of about 1 m2/g to about 10 m2/g. The thermoplastic resin composition and the molded article formed thereof can have good properties in terms of discoloration resistance, antibacterial activity, and the like even after being irradiated with ionizing radiation.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: October 27, 2020
    Assignee: Lotte Advanced Materials Co., Ltd.
    Inventors: Yoen Kyoung Kim, Joo Hyun Jang, Ju Sung Kim, Kyung Min Park, Dong Hyun Park, Seung Yong Bae, Cheon Seok Yang
  • Publication number: 20200319794
    Abstract: An electronic device includes a display configured to display at least one content, a pressure sensor configured to sense a touch input having a pressure value of a specified value or more, a memory, and a processor operatively connected to the display, the pressure sensor, and the memory. When the touch input occurs in a first screen of the display, the processor is configured to determine an input location of the touch input, to verify content displayed at a display location of the first screen corresponding to the input location, to create a widget including information associated with the content, and to output the created widget to a second screen of the display.
    Type: Application
    Filed: June 14, 2017
    Publication date: October 8, 2020
    Inventors: Dong Jin EUN, Woo Hyun KIM, Hee Jin KIM, Seung Yong LEE, Chi Hoon LEE, Hae Na LEE, Jee Yeun WANG, Ah Young KIM, Hyun Seok SEO, Hyo Jin BAE, Wan Soo LIM, Hee Woon KIM, Sung Chan BAE, Jung Eui SEO
  • Patent number: 10784344
    Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: September 22, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seung-Min Song, Woo-Seok Park, Jung-Gil Yang, Geum-Jong Bae, Dong-Il Bae
  • Publication number: 20200233252
    Abstract: A substrate having a spacer thereon and an optical device including the same are disclosed herein. In some embodiments, a substrate includes a base layer, a transparent column spacer formed on the base layer, and a black layer present between the transparent column spacer and the base layer. In some embodiments, an alignment film is present on the spacer.
    Type: Application
    Filed: January 24, 2020
    Publication date: July 23, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Nam Seok Bae, Seung Heon Lee, Song Ho Jang, Dong Hyun Oh, Jin Woo Park, Ji Young Hwang, Jung Sun You, Han Min Seo, Cheol Ock Song
  • Publication number: 20200191423
    Abstract: The disclosure an air conditioning system and a method of controlling the same. During the heating operation of the A2W indoor unit, the A2A valve that connects the outdoor unit to the A2A indoor unit is closed to prevent the inflow of the refrigerant into the A2A indoor unit, so it is possible to prevent performance degradation by improving performance loss due to refrigerant bypass to a stationary A2A indoor unit. In addition, in order to improve the performance due to deterioration of heating performance, the system itself can cope with a control algorithm without any additional hardware configuration, thereby minimizing the installation cost.
    Type: Application
    Filed: March 21, 2018
    Publication date: June 18, 2020
    Inventors: Woong SUN, Yong Sang KONG, Chang Soo LIM, Sung Jin CHO, Sung Tae KIM, Chang Seo PARK, Dong Seok BAE, Kwang Nam SHIN
  • Patent number: 10665723
    Abstract: A semiconductor device includes a substrate; protruding portions extending in parallel to each other on the substrate; nanowires provided on the protruding portions and separated from each other; gate electrodes provided on the substrate and surrounding the nanowires; source/drain regions provided on the protruding portions and sides of each of the gate electrodes, the source/drain regions being in contact with the nanowires; and first voids provided between the source/drain regions and the protruding portions.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: May 26, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Min Song, Woo Seok Park, Geum Jong Bae, Dong Il Bae, Jung Gil Yang
  • Patent number: 10659947
    Abstract: An apparatus for transmitting shelter location information is disclosed. The apparatus for transmitting shelter location information according to an embodiment of the present disclosure includes a wake-up information checking unit that checks a value of a wake-up indicator provided in a head of a data file to determine whether a disaster has occurred; and a shelter location information insertion unit inserting the shelter location information into an advanced emergency alert table (AEAT), as it is confirmed by the wake-up information checking unit that a disaster has occurred.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: May 19, 2020
    Assignees: Electronics and Telecommunications Research Institute, FOUNDATION FOR RESEARCH AND BUSINESS, SEOUL NATIONAL UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Sung Hoon Kim, Byung Jun Bae, Dong Ho Kim, Bong Seok Seo, Chang Jong Hyun, Eun Yeong Jeong
  • Publication number: 20200154257
    Abstract: An apparatus for transmitting shelter location information is disclosed. The apparatus for transmitting shelter location information according to an embodiment of the present disclosure includes a wake-up information checking unit that checks a value of a wake-up indicator provided in a head of a data file to determine whether a disaster has occurred; and a shelter location information insertion unit inserting the shelter location information into an advanced emergency alert table (AEAT), as it is confirmed by the wake-up information checking unit that a disaster has occurred.
    Type: Application
    Filed: November 12, 2019
    Publication date: May 14, 2020
    Applicants: Electronics and Telecommunications Research Institute, FOUNDATION FOR RESEARCH AND BUSINESS, SEOUL NATIONAL UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Sung Hoon KIM, Byung Jun BAE, Dong Ho KIM, Bong Seok SEO, Chang Jong HYUN, Eun Yeong JEONG
  • Publication number: 20200150478
    Abstract: A substrate on which spacers are disposed in a certain arrangement state and an optical device using such a substrate are provided. A plurality of spacers are irregularly disposed on a substrate depending on a predetermined rule, so that overall uniform optical characteristics can be ensured without causing a so-called moire phenomenon or the like, while the spacers maintain the uniform cell gap in the construction of the optical device.
    Type: Application
    Filed: July 27, 2018
    Publication date: May 14, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Han Min Seo, Ji Young Hwang, Hyeon Choi, Seung Heon Lee, Dong Hyun Oh, Jung Sun You, Cheol Ock Song, Nam Seok Bae
  • Publication number: 20200124894
    Abstract: A substrate on which a specific type spacer is formed, a substrate comprising an alignment film formed on the spacer, and an optical device using such a substrate are disclosed herein. By controlling the shape of the spacer formed on the substrate, even when the alignment film is formed on the top of the spacer and the orientation treatment is performed, the uniform orientation treatment can be performed without any influence by the step or the like of the spacer, whereby a substrate or the like capable of providing a device having excellent optical performance can be provided.
    Type: Application
    Filed: December 20, 2019
    Publication date: April 23, 2020
    Applicant: LG Chem, Ltd.
    Inventors: Han Min Seo, Ji Young Hwang, Cheol Ock Song, Nam Seok Bae, Seung Heon Lee, Dong Hyun Oh, Jung Sun You