Patents by Inventor Dong-Su Kim

Dong-Su Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070264569
    Abstract: Disclosed is a secondary battery comprising a lithium transition metal oxide as a cathode active material, wherein an organic ammonium compound is added to a cathode and/or is coated on a separator. Therefore, the secondary battery according to the present invention can achieve improvements in residual capacity and recovery capacity even after high-temperature storage of the battery, simultaneously with improved power retention of the battery at low and high temperatures.
    Type: Application
    Filed: March 7, 2007
    Publication date: November 15, 2007
    Applicant: LG CHEM, LTD.
    Inventors: Changjoo HAN, Jonghwan KIM, Dong-Su KIM, Hojin JEON
  • Patent number: 7263256
    Abstract: An optical module is disclosed. The optical module includes a substrate, and at least one planar optical waveguide that includes a plurality of waveguides and at least one groove vertically penetrating the upper surface of the substrate and which is successively laminated on the substrate. The optical module also includes at least one PCB having at least one integrated photoelectric conversion device that is positioned on the planar optical waveguide facing a corresponding groove, and at least one optical connection block including a body and optical fibers embedded in the body in such a manner that both ends thereof are exposed to the lateral and upper surfaces of the body. The optical connection block is inserted into the corresponding groove of the planar optical waveguide in such a manner that both ends of the optical fibers, which have been exposed, face the waveguides and the PCBs, respectively.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: August 28, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Su Kim, Hyo-Hun Park, Byung-Sup Rho, Han-Seo Cho, Sun-Tae Jung
  • Patent number: 7239767
    Abstract: A packaging apparatus for optical interconnection on an optical PCB includes a first substrate with a via hole formed therethrough and in which an optical waveguide is formed, an optical interconnection block having a reflective plane on its lower end inserted into the via hole, a second substrate flip-bonded to an upper surface of the first substrate, and an optically active element flip-bonded to a lower surface of the second substrate and aligned for optical communication.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: July 3, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Su Kim, Hyo-Hoon Park, Han-Seo Cho, Byung-Sup Rho, Sun-Tae Jung
  • Patent number: 7006736
    Abstract: A planar light wave circuit is disclosed, which comprises: a first waveguide for receiving optical signals from an outside; a second waveguide having a first end surface and a second end surface, so that lights outputted from the first waveguide are partially reflected by the first end surface and are partially incidented into the first end surface and then outputted through the second end surface; a third waveguide for receiving the light reflected by the first end surface; and a common region bordering each end surface of the first to the third waveguides and having an index of refraction different from an index of refraction of the second waveguide.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: February 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Hoon Lee, Dong-Su Kim, Kyoung-Youm Kim
  • Patent number: 6957902
    Abstract: The present invention pertains to a vehicle lamp, comprising: a lamp body in which a first illuminating direction and a second illuminating direction perpendicular to the first illuminating direction are open; an illumination lens for forming a lamp by closing the lamp body and having a first illumination surface through which the light from the light source outgoes to the first illuminating direction, and a second illumination surface through which the light from the light source outgoes to the second illuminating direction; a first reflecting surface for reflecting the light from the light source into the first illuminating direction; a shield for shielding a part of the light proceeded from the light source to the first illuminating direction; and a second reflecting surface formed on the surface facing the light source of the shield, wherein the second reflecting surface reflects and directs the light shielded by the shield into the second illuminating direction.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: October 25, 2005
    Assignee: Samlip Industrial Co., Ltd.
    Inventor: Dong-Su Kim
  • Publication number: 20050220437
    Abstract: An optical module is disclosed. The optical module includes a substrate, and at least one planar optical waveguide that includes a plurality of waveguides and at least one groove vertically penetrating the upper surface of the substrate and which is successively laminated on the substrate. The optical module also includes at least one PCB having at least one integrated photoelectric conversion device that is positioned on the planar optical waveguide facing a corresponding groove, and at least one optical connection block including a body and optical fibers embedded in the body in such a manner that both ends thereof are exposed to the lateral and upper surfaces of the body. The optical connection block is inserted into the corresponding groove of the planar optical waveguide in such a manner that both ends of the optical fibers, which have been exposed, face the waveguides and the PCBs, respectively.
    Type: Application
    Filed: October 6, 2004
    Publication date: October 6, 2005
    Inventors: Dong-Su Kim, Hyo-Hun Park, Byung-Sup Rho, Han-Seo Cho, Sun-Tae Jung
  • Publication number: 20050100264
    Abstract: A packaging apparatus for optical interconnection on an optical PCB includes a first substrate with a via hole formed therethrough and in which an optical waveguide is formed, an optical interconnection block having a reflective plane on its lower end inserted into the via hole, a second substrate flip-bonded to an upper surface of the first substrate, and an optically active element flip-bonded to a lower surface of the second substrate and aligned for optical communication.
    Type: Application
    Filed: March 8, 2004
    Publication date: May 12, 2005
    Inventors: Dong-Su Kim, Hyo-Hoon Park, Han-Seo Cho, Byung-Sup Rho, Sun-Tae Jung
  • Publication number: 20050018442
    Abstract: The present invention pertains to a vehicle lamp, comprising: a lamp body in which a first illuminating direction and a second illuminating direction perpendicular to the first illuminating direction are open; an illumination lens for forming a lamp by closing the lamp body and having a first illumination surface through which the light from the light source outgoes to the first illuminating direction, and a second illumination surface through which the light from the light source outgoes to the second illuminating direction; a first reflecting surface for reflecting the light from the light source into the first illuminating direction; a shield for shielding a part of the light proceeded from the light source to the first illuminating direction; and a second reflecting surface formed on the surface facing the light source of the shield, wherein the second reflecting surface reflects and directs the light shielded by the shield into the second illuminating direction.
    Type: Application
    Filed: December 19, 2003
    Publication date: January 27, 2005
    Applicant: SAMLIP INDUSTRIAL CO., LTD.
    Inventor: Dong-Su Kim
  • Patent number: 6841860
    Abstract: Disclosed are a flip-chip bonding structure for improving the vertical alignment of an optical device relative to a PLC and a flip-chip bonding method for achieving this structure. The flip-chip bonding structure includes: a semiconductor substrate; a lower-clad layer formed on the upper surface of the semiconductor substrate, wherein the lower-clad layer is depressed on a designated area for mounting an optical device; vertical alignment structures formed on a part of the upper surface of the depressed area of the lower-clad layer and determining a vertical alignment position of the optical device on the semiconductor substrate; electrodes formed on another part of the upper surface of the depressed area of the lower-clad layer; a solder bump formed on the upper surfaces of the electrodes; and, an optical device bonded to the substrate by a flip-chip bonding method using the solder bump.
    Type: Grant
    Filed: September 16, 2002
    Date of Patent: January 11, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Hoon Lee, Duk-Yong Choi, Dong-Su Kim
  • Publication number: 20040247231
    Abstract: A planar light wave circuit is disclosed, which comprises: a first waveguide for receiving optical signals from an outside; a second waveguide having a first end surface and a second end surface, so that lights outputted from the first waveguide are partially reflected by the first end surface and are partially incidented into the first end surface and then outputted through the second end surface; a third waveguide for receiving the light reflected by the first end surface; and a common region bordering each end surface of the first to the third waveguides and having an index of refraction different from an index of refraction of the second waveguide.
    Type: Application
    Filed: December 8, 2003
    Publication date: December 9, 2004
    Inventors: Joo-Hoon Lee, Dong-Su Kim, Kyoung-Youm Kim
  • Patent number: 6799713
    Abstract: Disclosed are a flip-chip bonding structure for improving the vertical alignment of an optical device relative to a PLC and a flip-chip bonding method for achieving this structure. The flip-chip bonding structure includes: a semiconductor substrate; a lower-clad layer formed on the upper surface of the semiconductor substrate, wherein the lower-clad layer is depressed on a designated area for mounting an optical device; vertical alignment structures formed on a part of the upper surface of the depressed area of the lower-clad layer and determining a vertical alignment position of the optical device on the semiconductor substrate; electrodes formed on another part of the upper surface of the depressed area of the lower-clad layer; a solder bump formed on the upper surfaces of the electrodes; and, an optical device bonded to the substrate by a flip-chip bonding method using the solder bump.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: October 5, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Hoon Lee, Duk-Yong Choi, Dong-Su Kim
  • Publication number: 20040156637
    Abstract: A wavelength-division-multiplexing system is disclosed and includes: a semiconductor-amplification section for amplifying each inputted channel with amplification factors corresponding to the compensation signals received therein; a multiplexer for multiplexing a plurality of channels inputted from the semiconductor-amplification section and outputting the multiplexed signals; an optical-detection section for splitting a part of the multiplexed optical signals inputted from the multiplexer, demultiplexing the split optical signals into a plurality of channels, converting each of the demultiplexed channels into corresponding electric signals, and outputting the electric signals; and, a control section calculating the pertinent intensity deviations by comparing each intensity of the electric signals inputted from the optical-detection section with a preset reference intensity and outputting compensation signals for compensating the intensity deviation of each channel to the semiconductor-amplification section.
    Type: Application
    Filed: August 1, 2003
    Publication date: August 12, 2004
    Inventors: Sun-Tae Jung, Duk-Yong Choi, Joo-Hoon Lee, Dong-Su Kim
  • Patent number: 6756319
    Abstract: There is provided a silica microstructure fabrication method. An etch stop layer is first partially deposited on an etching area of a first silica layer formed on a semiconductor substrate. A second silica layer is deposited on the surfaces of the etch stop layer and the first silica layer. A mask patterned according to the shape of the etching area is formed on the surface of the second silica layer. The second silica layer is removed from the etching area using the mask by dry etching, and the etch stop layer is removed by wet etching. A silica microstructure which is manufactured according to the present method has the second silica layer removed according to a predetermined vertical profile to provide a precise removal of the overcladding layer in a microstructure.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: June 29, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Dong-Su Kim
  • Publication number: 20040093901
    Abstract: Disclosed is a method for fabricating an optical fiber block, in which a cover formed from glass is bonded onto a substrate, the top of which is provided with one or more grooves. The method comprising the steps of: heating the cover to a predetermined temperature; and applying an electric field so that electrostatic attraction is generated in the interface of the cover and the substrate in the state in which the heated cover is being seated on the top of the substrate, thereby bonding the cover and the substrate.
    Type: Application
    Filed: September 15, 2003
    Publication date: May 20, 2004
    Inventors: Hyun-Ki Kim, Dong-Su Kim, In-Jae Lee
  • Publication number: 20040041009
    Abstract: Disclosed are a flip-chip bonding structure for improving the vertical alignment of an optical device relative to a PLC and a flip-chip bonding method for achieving this structure. The flip-chip bonding structure includes: a semiconductor substrate; a lower-clad layer formed on the upper surface of the semiconductor substrate, wherein the lower-clad layer is depressed on a designated area for mounting an optical device; vertical alignment structures formed on a part of the upper surface of the depressed area of the lower-clad layer and determining a vertical alignment position of the optical device on the semiconductor substrate; electrodes formed on another part of the upper surface of the depressed area of the lower-clad layer; a solder bump formed on the upper surfaces of the electrodes; and, an optical device bonded to the substrate by a flip-chip bonding method using the solder bump.
    Type: Application
    Filed: September 3, 2003
    Publication date: March 4, 2004
    Inventors: Joo-Hoon Lee, Duk-Yong Choi, Dong-Su Kim
  • Publication number: 20030205794
    Abstract: Disclosed are a flip-chip bonding structure for improving the vertical alignment of an optical device relative to a PLC and a flip-chip bonding method for achieving this structure. The flip-chip bonding structure includes: a semiconductor substrate; a lower-clad layer formed on the upper surface of the semiconductor substrate, wherein the lower-clad layer is depressed on a designated area for mounting an optical device; vertical alignment structures formed on a part of the upper surface of the depressed area of the lower-clad layer and determining a vertical alignment position of the optical device on the semiconductor substrate; electrodes formed on another part of the upper surface of the depressed area of the lower-clad layer; a solder bump formed on the upper surfaces of the electrodes; and, an optical device bonded to the substrate by a flip-chip bonding method using the solder bump.
    Type: Application
    Filed: September 16, 2002
    Publication date: November 6, 2003
    Inventors: Joo-Hoon Lee, Duk-Yong Choi, Dong-Su Kim
  • Publication number: 20020004316
    Abstract: There is provided a silica microstructure fabrication method. An etch stop layer is first partially deposited on an etching area of a first silica layer formed on a semiconductor substrate. A second silica layer is deposited on the surfaces of the etch stop layer and the first silica layer. A mask patterned according to the shape of the etching area is formed on the surface of the second silica layer. The second silica layer is removed from the etching area using the mask by dry etching, and the etch stop layer is removed by wet etching. A silica microstructure which is manufactured according to the present method has the second silica layer removed according to a predetermined vertical profile to provide a precise removal of the overcladding layer in a microstructure.
    Type: Application
    Filed: July 5, 2001
    Publication date: January 10, 2002
    Applicant: SAMSUNG ELECTRONIC CO., LTD.
    Inventor: Dong-Su Kim
  • Patent number: 6005266
    Abstract: A low leakage current monolithic InGaAs InP discrete device is provided for a focal plane array for near-infrared imaging. The array consists of a plurality of InGaAs p-i-n diodes for photodetectors, with each being integrated on a common substrate with an Inp junction field effect transistor (JFET) as a switching element for each pixel. In order to minimize the drain and gate leakage to achieve high-detection sensitivity, a p-encapsulation of an n-drained of each JFET is employed.
    Type: Grant
    Filed: March 13, 1997
    Date of Patent: December 21, 1999
    Assignee: The Trustees of Princeton University
    Inventors: Stephen Ross Forrest, Marshall J. Cohen, Michael J. Lange, Dong-Su Kim
  • Patent number: 5518934
    Abstract: A multiwavelength local plane array infrared detector is included on a common substrate having formed on its top face a plurality of In.sub.x Ga.sub.1-x As (x.ltoreq.0.53) absorption layers, between each pair of which a plurality of InAs.sub.y P.sub.1-y (y.ltoreq.
    Type: Grant
    Filed: December 23, 1994
    Date of Patent: May 21, 1996
    Assignee: Trustees of Princeton University
    Inventors: Stephen R. Forrest, Gregory H. Olsen, Dong-Su Kim, Michael J. Lange
  • Patent number: 5479032
    Abstract: A multiwavelength focal plane array infrared detector is included on a common substrate having formed on its top face a plurality of In.sub.x Ga.sub.1-x As (x.ltoreq.0.53) absorption layers, between each pair of which a plurality of InAs.sub.y P.sub.
    Type: Grant
    Filed: July 21, 1994
    Date of Patent: December 26, 1995
    Assignee: Trustees of Princeton University
    Inventors: Stephen R. Forrest, Gregory H. Olsen, Dong-Su Kim, Michael J. Lange