Patents by Inventor Dong Suk Shin

Dong Suk Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124363
    Abstract: An antiferroelectric and a method for manufacturing an antiferroelectric are disclosed herein. The antiferroelectric may have high permittivity and breakdown voltage by having a PbxLa1-x([Zr1-YSnY]ZTi1-Z) composition. The manufacturing of the antiferroelectric may be performed through appropriate mixing and dysprosium addition.
    Type: Application
    Filed: July 26, 2023
    Publication date: April 18, 2024
    Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATION, KOREA INSTITUTE OF CERAMIC ENGINEERING AND TECHNOLOGY
    Inventors: Hyung Suk Kim, Hyo Soon Shin, Dong Hun Yeo, Jeoung Sik Choi
  • Patent number: 11950425
    Abstract: A mold structure includes gate electrodes stacked on a first substrate, a channel structure penetrating a first region of the mold structure to cross the gate electrodes, a first through structure penetrating a second region of the mold structure, and a second through structure penetrating a third region of the mold structure. The mold structure includes memory cell blocks extending in a first direction and spaced apart in a second direction, and a dummy block extending in the first direction and disposed between the memory cell blocks. Each of the memory cell and dummy blocks includes a cell region and an extension region arranged in the first direction. The first region is the cell region of one of the memory cell blocks, the second region is the extension region of the one of the memory cell blocks, and the third region is the extension region of the dummy block.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: April 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung Hun Lee, Dong Ha Shin, Pan Suk Kwak, Dae Seok Byeon
  • Publication number: 20240081849
    Abstract: Provided herein is a mechanism to controllably move a wire within a flexible tubular member, the wire including opposed wire ends extending outwardly of a proximal end of the flexible tubular member, comprising a drive mechanism and a coupling located between the drive mechanism and the wire end, wherein movement of the coupling in the direction of the wire end results in opposed motion of the wire end.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Daniel H. KIM, Dong Suk SHIN, Taeho JANG, Yongman PARK, Jeihan LEE, Hongmin KIM, Kihoon NAM, Seokyung HAN
  • Publication number: 20240075853
    Abstract: An apparatus of tilting a seat cushion of a vehicle, includes a tilting motor, a pinion gear, a sector gear, and a tilting link which perform the tilting operation of the seat cushion and exert a binding force in a tilted state of the seat cushion and are provided to be connected to both of one side and the other side of a seat cushion frame, and has two sector gears positioned on left and right sides and connected to each other by a connection bar so that, by strengthening a binding force of the front portion of the seat cushion, it is possible to secure the safety of passengers in the event of a collision.
    Type: Application
    Filed: April 13, 2023
    Publication date: March 7, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, DAS CO., LTD, Faurecia Korea, Ltd., Hyundai Transys Inc.
    Inventors: Sang Soo LEE, Mu Young KIM, Sang Hark LEE, Ho Suk JUNG, Sang Do PARK, Chan Ho JUNG, Dong Hoon LEE, Hea Yoon KANG, Deok Soo LIM, Seung Pil JANG, Seon Ho KIM, Jong Seok YUN, Hyo Jin KIM, Dong Gyu SHIN, Jin Ho SEO, Young Jun KIM, Taek Jun NAM
  • Patent number: 11918766
    Abstract: The disclosure provides a flexible, narrow medical device (such as a micro-catheter or a guidewire) that is controllably moved and steered through lumens of a body. The medical device may include an electrically-actuatable bendable portion at a distal end, which may be provided by a polymer electrolyte layer, electrodes distributed about the polymer electrolyte layer, and electrical conduits coupled to the electrodes, such that the polymer electrolyte layer deforms asymmetrically in response to an electrical signal through one or more conduits. The disclosure further includes a controller for moving the device into and out of bodily lumens and for applying the electrical signal for steering the device. The device further includes methods of preparing the polymer electrolyte layer in tubular shape.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: March 5, 2024
    Assignee: BOARD OF REGENTS OF THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Daniel H. Kim, Dong Suk Shin, Viljar Palmre
  • Publication number: 20240058079
    Abstract: An instrument cart configured to position an instrument controller at a desired location and attitude pitch with respect to an incision location of a patient includes a base, a lift member moveable with respect to the base, a first planar translation member connected to the lift member and arcuately moveable with respect thereto, a second planar translation member connected to the first planar translation member and arcuately moveable with respect thereto, a third planar translation member connected to the second planar translation member and arcuately moveable with respect thereto, an arcuate slide base connected to the third planar translation member and moveable with respect thereto and an arcuate slide coupled to the arcuate slide base, and moveable with respect thereto; and an instrument controller coupling connected to the arcuate slide member, the instrument controller connected thereto and movable with respect thereto.
    Type: Application
    Filed: January 17, 2020
    Publication date: February 22, 2024
    Inventors: Daniel H. KIM, Dong Suk SHIN, Taeho JANG, Yongman PARK, Jeihan LEE, Kihoon NAM, Yongchul SHIN
  • Publication number: 20240014304
    Abstract: A semiconductor device includes a lower pattern on a substrate and protruding in a first direction, a source/drain pattern on the lower pattern and including a semiconductor liner film in contact with the lower pattern, and an epitaxial insulating liner extending along at least a portion of a sidewall of the semiconductor liner film, wherein the epitaxial insulating liner is in contact with the semiconductor liner film, wherein the semiconductor liner film includes a first portion, wherein the first portion of the semiconductor liner film includes a first point spaced apart from the lower pattern at a first height, and a second point spaced apart from the lower pattern at a second height, wherein the second height is greater than the first height, wherein a width of the semiconductor liner film in a second direction at the first point is less than a width of the semiconductor liner film in the second direction at the second point, and wherein the epitaxial insulating liner extends along at least a portion of
    Type: Application
    Filed: February 16, 2023
    Publication date: January 11, 2024
    Inventors: Kyung Bin Chun, Jin Bum Kim, Dong Suk Shin, Gyeom Kim, Da Hye Kim
  • Patent number: 11850378
    Abstract: The disclosure provides a flexible, narrow medical device (such as a micro-catheter or a guidewire) that is controllably moved and steered through lumens of a body. The medical device may include an electrically-actuatable bendable portion at a distal end, which may be provided by a polymer electrolyte layer, electrodes distributed about the polymer electrolyte layer, and electrical conduits coupled to the electrodes, such that the polymer electrolyte layer deforms asymmetrically in response to an electrical signal through one or more conduits. The disclosure further includes a controller for moving the device into and out of bodily lumens and for applying the electrical signal for steering the device. The device further includes methods of preparing the polymer electrolyte layer in tubular shape.
    Type: Grant
    Filed: February 17, 2020
    Date of Patent: December 26, 2023
    Assignee: BOARD OF REGENTS OF THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Daniel H. Kim, Dong Suk Shin, Viljar Palmre
  • Publication number: 20230343787
    Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Dong-chan SUH, Gi-gwan PARK, Dong-woo KIM, Dong-suk SHIN
  • Patent number: 11784255
    Abstract: A semiconductor device may include a first active fin, a second active fin and a gate structure. The first active fin may extend in a first direction on a substrate and may include a first straight line extension portion, a second straight line extension portion, and a bent portion between the first and second straight line extension portions. The second active fin may extend in the first direction on the substrate. The gate structure may extend in a second direction perpendicular to the first direction on the substrate. The gate structure may cross one of the first and second straight line extension portions of the first active fin and may cross the second active fin.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: October 10, 2023
    Inventors: Hyun-Kwan Yu, Sung-Min Kim, Dong-Suk Shin, Seung-Hun Lee, Dong-Won Kim
  • Patent number: 11728434
    Abstract: A semiconductor device includes a first fin type pattern on a substrate, a second fin type pattern, parallel to the first fin type pattern, on the substrate, and an epitaxial pattern on the first and second fin type patterns. The epitaxial pattern may include a shared semiconductor pattern on the first fin type pattern and the second fin type pattern. The shared semiconductor pattern may include a first sidewall adjacent to the first fin type pattern and a second sidewall adjacent to the second fin type pattern. The first sidewall may include a first lower facet, a first upper facet on the first lower facet and a first connecting curved surface connecting the first lower and upper facets. The second sidewall may include a second lower facet, a second upper facet on the second lower facet and a second connecting curved surface connecting the second lower and upper facets.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seok Hoon Kim, Dong Myoung Kim, Dong Suk Shin, Seung Hun Lee, Cho Eun Lee, Hyun Jung Lee, Sung Uk Jang, Edward Nam Kyu Cho, Min-Hee Choi
  • Patent number: 11728345
    Abstract: A semiconductor device includes a substrate including a first region and a second region, fin type active areas extending in a first direction away from the substrate in each of the first and second regions, a plurality of nanosheets extending parallel to an upper surface of the fin type active areas and being spaced apart from the upper surface of the fin type active areas, a gate extending over the fin type active areas in a second direction crossing the first direction, a gate dielectric layer interposed between the gate and each of the nanosheets, first source and drain regions included in the first region and second source and drain regions included in the second region, and insulating spacers interposed between the fin type active areas and the nanosheets, wherein air spacers are interposed between the insulating spacers and the first source and drain regions.
    Type: Grant
    Filed: June 11, 2021
    Date of Patent: August 15, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-chan Suh, Gi-gwan Park, Dong-woo Kim, Dong-suk Shin
  • Publication number: 20230253449
    Abstract: A semiconductor device includes a lower pattern extending in a first direction and sheet patterns spaced apart therefrom in a second direction, a gate structure on the lower pattern and including a gate insulating layer, a gate spacer, and a gate electrode, a source/drain pattern on the lower pattern and in contact with the sheet patterns and the gate insulating layer, and a first etch blocking pattern between the gate spacer and the source/drain pattern. The gate spacer includes an inner sidewall extending in the third direction, and a connection sidewall extending from the inner sidewall in the first direction. The source/drain pattern includes a semiconductor filling layer on a semiconductor liner layer that is in contact with the sheet pattern and includes a facet surface extending from the connection sidewall. The first etch blocking pattern is in contact with the facet surface and the connection sidewall.
    Type: Application
    Filed: September 26, 2022
    Publication date: August 10, 2023
    Inventors: Dong Suk Shin, Hyun-Kwan Yu, Seok Hoon Kim, Pan Kwi Park, Yong Seung Kim, Jung Taek Kim
  • Publication number: 20230145260
    Abstract: A semiconductor device including: a plurality of fin-shaped patterns spaced apart from each other in a first direction and extending in a second direction on a substrate; a field insulating layer covering sidewalls of the plurality of fin-shaped patterns and disposed between the fin-shaped patterns; a source/drain pattern connected to the plurality of fin-shaped patterns on the field insulating layer, the source/drain pattern including bottom surfaces respectively connected to the fin-shaped patterns, and at least one connection surface connecting the bottom surfaces to each other; and a sealing insulating pattern extending along the connection surface of the source/drain pattern and an upper surface of the field insulating layer, wherein the source/drain pattern includes a silicon-germanium pattern doped with a p-type impurity.
    Type: Application
    Filed: June 3, 2022
    Publication date: May 11, 2023
    Inventors: Yang Xu, Nam Kyu Cho, Seok Hoon Kim, Yong Seung Kim, Pan Kwi Park, Dong Suk Shin, Sang Gil Lee, Si Hyung Lee
  • Publication number: 20230116342
    Abstract: A semiconductor device is provided. A semiconductor device includes: a first active pattern spaced apart from a substrate and extending in a first direction; a second active pattern spaced apart further from the substrate than the first active pattern and extending in the first direction; a gate structure on the substrate, the gate structure extending in a second direction crossing the first direction and penetrating the first active pattern and the second active pattern; a first source/drain region on at least one side surface of the gate structure and connected to the first active pattern; a second source/drain region on at least one side surface of the gate structure and connected to the second active pattern; and a buffer layer between the substrate and the first active pattern, the buffer layer containing germanium.
    Type: Application
    Filed: June 1, 2022
    Publication date: April 13, 2023
    Inventors: Won Hee Choi, Sung Uk Jang, Dong Suk Shin, Bong Jin Kuh, Kong Soo Lee
  • Publication number: 20230108041
    Abstract: A semiconductor device includes an active pattern which includes a lower pattern extending in a first direction, and sheet patterns spaced apart from the lower pattern in a second direction perpendicular to an upper surface of the lower pattern, each sheet pattern including an upper surface and a lower surface, a gate structure disposed on the lower pattern and including a gate electrode and a gate insulating film, the gate electrode and the gate insulating film surrounding each sheet pattern, and a source/drain pattern disposed on at least one side of the gate structure. The gate structure includes inter-gate structures that are disposed between the lower pattern and a lowermost sheet pattern and between two sheet patterns, and contacts the source/drain pattern. The gate insulating film includes a horizontal portion with a first thickness, and a first vertical portion with a second thickness different from the first thickness.
    Type: Application
    Filed: July 14, 2022
    Publication date: April 6, 2023
    Inventors: Hae Jun YU, Dong Suk SHIN, Soon Wook JUNG, Kyung In CHOI
  • Patent number: 11607238
    Abstract: The disclosure provides a surgical apparatus comprising: a steerable member that is bendable and comprises a plurality of bending segments with channels therein; and a plurality of bending actuation wires that are arranged to pass through the steerable member and cause the steerable member to bend, the steerable member comprising at least one outwardly opening lumen through which the bending actuation wires pass.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 21, 2023
    Assignee: BOARD OF REGENTS OF THE UNIVERSITY OF TEXAS SYSTEM
    Inventors: Daniel H. Kim, Dong Suk Shin, Taeho Jang, Yong Man Park
  • Publication number: 20230056095
    Abstract: A semiconductor device includes a substrate including a first region and a second region, a first active pattern on the first region, a first gate structure having a first width in the first direction, on the first active pattern, a first epitaxial pattern disposed in the first active pattern on a side surface of the first gate structure, a second active pattern on the second region, a second gate structure having a second width greater than the first width in the first direction, on the second active pattern and a second epitaxial pattern disposed in the second active pattern on a side surface of the second gate structure. Each of the first epitaxial pattern and the second epitaxial pattern includes silicon germanium (SiGe), and a first Ge concentration of the first epitaxial pattern is lower than a second Ge concentration of the second epitaxial pattern.
    Type: Application
    Filed: May 2, 2022
    Publication date: February 23, 2023
    Inventors: Nam Kyu CHO, Sang Gil LEE, Seok Hoon KIM, Yong Seung KIM, Jung Taek KIM, Pan Kwi PARK, Dong Suk SHIN, Si Hyung LEE, Yang XU
  • Publication number: 20230058991
    Abstract: A semiconductor device including first fin-shaped patterns in a first region of a substrate and spaced apart from each other in a first direction, second fin-shaped patterns in a second region of the substrate and spaced apart from each other in a second direction, a first field insulating film on the substrate and covering sidewalls of the first fin-shaped patterns, a second field insulating film on the substrate and covering sidewalls of the second fin-shaped patterns, a first source/drain pattern on the first field insulating film, connected to the first fin-shaped patterns, and including a first silicon-germanium pattern, and a second source/drain pattern on the second field insulating film, connected to the second fin-shaped patterns, and including a second silicon-germanium pattern, the second source/drain pattern and the second field insulating film defining one or more first air gaps therebetween may be provided.
    Type: Application
    Filed: March 9, 2022
    Publication date: February 23, 2023
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Yang XU, Nam Kyu CHO, Seok Hoon KIM, Yong Seung KIM, Pan Kwi PARK, Dong Suk SHIN, Sang Gil LEE, Si Hyung LEE
  • Publication number: 20230011153
    Abstract: A semiconductor device comprises an active pattern on a substrate; a plurality of nanosheets spaced apart from each other; a gate electrode surrounding each of the nanosheets; a field insulating layer surrounding side walls of the active pattern; an interlayer insulating layer on the field insulating layer; a source/drain region comprising a first doping layer on the active pattern, a second doping layer on the first doping layer, and a capping layer forming side walls adjacent to the interlayer insulating layer; a source/drain contact electrically connected to, and on, the source/drain region, and a silicide layer between the source/drain region and the source/drain contact which contacts contact with the second doping layer and extends to an upper surface of the source/drain region. The capping layer extends from an upper surface of the field insulating layer to the upper surface of the source/drain region along side walls of the silicide layer.
    Type: Application
    Filed: February 15, 2022
    Publication date: January 12, 2023
    Inventors: Dong Woo Kim, Gyeom Kim, Jin Bum Kim, Dong Suk Shin, Sang Moon Lee