Patents by Inventor Dong-Uk Lee

Dong-Uk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210174849
    Abstract: An inversion signal generation circuit may include a transition detection signal generation circuit suitable for generating first to fourth transition detection signals, a first XOR gate suitable for receiving a fourth inversion signal and the first transition detection signal, and generating a first pre-inversion signal, a second XOR gate suitable for receiving the first pre-inversion signal and the second transition detection signal, and generating a second pre-inversion signal, a third XOR gate suitable for receiving the second transition detection signal and the third transition detection signal, a fourth XOR gate suitable for receiving the first pre-inversion signal and an output signal of the third XOR gate, and generating a third pre-inversion signal, a fifth XOR gate suitable for receiving the third pre-inversion signal and the fourth transition detection signal, and generating a fourth pre-inversion signal, and a first alignment circuit suitable for generating first to fourth inversion signals.
    Type: Application
    Filed: August 7, 2020
    Publication date: June 10, 2021
    Inventor: Dong Uk LEE
  • Publication number: 20210143285
    Abstract: A semiconductor memory device includes, a stack structure, and a channel structure passing through the stack structure, wherein the channel structure includes a channel layer passing through the stack structure and a memory layer surrounding the channel layer, the stack structure includes a gate contacting the channel layer, and the channel layer and the gate form a Schottky junction.
    Type: Application
    Filed: April 2, 2020
    Publication date: May 13, 2021
    Applicant: SK hynix Inc.
    Inventors: Dong Uk LEE, Hae Chang YANG
  • Patent number: 11004504
    Abstract: A controller comprises an error correction circuit configured to check an error bit number of error bits in the read data and correct the error bits; a read retry range setting circuit configured to reset a preset read retry range with respect to the read data, and set a new read retry range based on the error bit number and an error correction capability of the error correction circuit; a read voltage setting circuit configured to reset the set read voltage and set, as a new read voltage, a voltage among a plurality of voltages of the reset read retry range, corresponding to the new read retry range; and a flash control circuit configured to control the memory device to perform a read retry operation on the stored data, using the new read voltage.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: May 11, 2021
    Assignee: SK hynix Inc.
    Inventors: Dong Uk Lee, Hun Wook Lee
  • Patent number: 10998078
    Abstract: Provided herein may be a memory system and a method of operating the memory system. The memory system may include: a semiconductor memory device including a plurality of memory cells to be programmed to an erase state and a plurality of program state; and a controller configured to control the semiconductor memory device to perform a program operation or a read operation in response to a request of a host. The controller may control the semiconductor memory device such that when, after a first program operation of the program operation has been performed, a number of program fail bits of the plurality of memory cells is greater than a maximum allowed number of ECC bits, a second program operation is performed on selected memory cells of the plurality of memory cells.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: May 4, 2021
    Assignee: SK hynix Inc.
    Inventors: Jae Hyuk Bang, Dong Uk Lee
  • Patent number: 10991400
    Abstract: An integrated circuit includes: one or more first sections in which first to Nth data (where N is an integer equal to or greater than 2) corresponding to one command are transferred through one line; and two or more second sections in which the first to Nth data are serial-to-parallel converted in 1:N and transferred through N lines, wherein whenever the command is applied, the first to Nth data are transferred without being inverted or transferred after being inverted repeatedly in at least one second section among the two or more second sections.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: April 27, 2021
    Assignee: SK hynix Inc.
    Inventors: Heat-Bit Park, Ji-Hwan Kim, Dong-Uk Lee
  • Publication number: 20210109873
    Abstract: A memory includes: a first data bus; a second data bus; and a plurality of bank groups. The bank groups output read data by alternately using the first data bus and the second data bus during read operations of the bank groups.
    Type: Application
    Filed: April 6, 2020
    Publication date: April 15, 2021
    Applicant: SK hynix Inc.
    Inventor: Dong-Uk LEE
  • Patent number: 10964365
    Abstract: A semiconductor apparatus may be provided. The semiconductor apparatus may include a fine training circuit configured to generate a fine result signal based on a clock signal, a data strobe signal, and a command. The semiconductor apparatus may include a coarse training circuit configured to generate a coarse result signal based on the clock signal, the data strobe signal, and the command and to set an offset of a write enable signal based on an offset control signal.
    Type: Grant
    Filed: February 3, 2020
    Date of Patent: March 30, 2021
    Assignee: SK hynix Inc.
    Inventors: Dong Uk Lee, Dong Kyun Kim, Min Su Park
  • Patent number: 10906269
    Abstract: A fibrous component for a vehicle exterior includes a skin layer having a multilayer structure comprising a laminated web including a reinforcing fiber and a binder fiber, the skin layer including pores that absorb sound; a sound absorbing pad layer disposed on an inner side of the skin layer and absorbing sound; and an adhesive layer disposed between the skin layer and the sound absorbing pad layer. The adhesive layer adheres the skin layer and the sound absorbing layer to each other.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: February 2, 2021
    Assignees: Hyundai Motor Company, Kia Motors Corporation
    Inventors: Dong Uk Lee, Su Nam Lee
  • Publication number: 20200388322
    Abstract: An address and command generation circuit, and a semiconductor system are disclosed. The address and command generation circuit may include a column address generator configured to correct an error of a column address, generate an internal column address based on an uncorrected column address when the column address corresponds to a read command, and generate the internal column address based on the corrected column address when the column address corresponds to a write command.
    Type: Application
    Filed: August 21, 2020
    Publication date: December 10, 2020
    Applicant: SK hynix Inc.
    Inventors: Dong Uk LEE, Ji Hwan KIM, Heat Bit PARK
  • Publication number: 20200365212
    Abstract: There are provided a memory device, a memory system including the memory device, and an operating method of the memory system. The memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit for performing a read operation by applying a read voltage to a selected memory block among the plurality of memory blocks, and control logic for controlling the peripheral circuit to perform a normal read operation using initially set voltages and a read retry operation using new read voltages. The peripheral circuit performs the read retry operation by using the new read voltage corresponding to program states other than at least one program state included in a specific threshold voltage region among a plurality of program states of the selected memory block.
    Type: Application
    Filed: October 11, 2019
    Publication date: November 19, 2020
    Inventor: Dong Uk LEE
  • Patent number: 10790011
    Abstract: An address and command generation circuit, and a semiconductor system are disclosed. The address and command generation circuit may include a column address generator configured to correct an error of a column address, generate an internal column address based on an uncorrected column address when the column address corresponds to a read command, and generate the internal column address based on the corrected column address when the column address corresponds to a write command.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 29, 2020
    Assignee: SK hynix Inc.
    Inventors: Dong Uk Lee, Ji Hwan Kim, Heat Bit Park
  • Publication number: 20200289671
    Abstract: Provided is a pharmaceutical composition for preventing or treating neuronal diseases comprising, as an active ingredient, an exon 2-deleted AIMP2 variant (AIMP2-DX2) gene or a vector comprising the gene, and a method for treating neuronal diseases in animals other than humans, comprising administering the same to a subject in need of treatment. The pharmaceutical composition comprising, as an active ingredient, a AIMP2-DX2 gene or a vector comprising the gene has the effects of apoptosis inhibition, dyskinesia amelioration and oxidative stress inhibition and thus can be widely used for preventing and treating neuronal diseases such as Parkinson's disease and amyotrophic lateral sclerosis.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Inventors: Jin Woo CHOI, Dong Uk LEE, Ki Hwan EUM
  • Patent number: 10770151
    Abstract: In a method for operating a semiconductor memory device including a plurality of memory blocks, the method includes: receiving a read command for a first memory block among the plurality of memory blocks; referring to a block read count value corresponding to the first memory block; determining whether the block read count value has reached a first threshold value; and performing a read operation on the first memory block, based on the determined result.
    Type: Grant
    Filed: January 22, 2020
    Date of Patent: September 8, 2020
    Assignee: SK hynix Inc.
    Inventors: Dong Uk Lee, Jae Hyuk Bang
  • Patent number: 10762012
    Abstract: A memory system memory system includes a first chip configured to perform a first operation, a second chip configured to perform a second operation, and a stacked memory device including a stacked structure of a plurality of memories. The stacked memory device being configured to be accessed by the first chip and the second chip through a shared bus.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: September 1, 2020
    Assignee: SK hynix Inc.
    Inventor: Dong Uk Lee
  • Patent number: 10761132
    Abstract: A semiconductor device includes a first integrated chip; a second integrated chip; a plurality of reference through-chip vias formed through the first and second integrated circuit chips; and at least a normal through-chip via formed through the first and second integrated circuit chips, wherein the first integrated circuit chip comprises: a plurality of reference sourcing circuits suitable for sourcing a reference current to the respective reference through-chip vias; and at least a sourcing circuit suitable for sourcing the reference current to the normal through-chip via, and wherein the second integrated circuit chip comprises: a plurality of reference sinking circuits suitable for sinking currents flowing through the respective reference through-chip vias; a line suitable for electrically coupling the plurality of reference through-chip vias; a comparison voltage generation circuit suitable for generating a plurality of comparison voltages based on a voltage of the line; at least a sinking circuit suitab
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: September 1, 2020
    Assignee: SK hynix Inc.
    Inventor: Dong-Uk Lee
  • Publication number: 20200257530
    Abstract: A data processing system includes a compute blade generating a write command to store data and a read command to read the data, and a memory blade. The compute blade has a memory that stores information about performance characteristics of each of a plurality of memories, and determines priority information through which eviction of a cache line is carried out based on the stored information.
    Type: Application
    Filed: April 28, 2020
    Publication date: August 13, 2020
    Inventors: Dong Uk LEE, Seung Gyu JEONG, Dong Ha JUNG
  • Patent number: 10716866
    Abstract: Provided is a pharmaceutical composition for preventing or treating neuronal diseases comprising, as an active ingredient, an exon 2-deleted AIMP2 variant (AIMP2-DX2) gene or a vector comprising the gene, and a method for treating neuronal diseases in animals other than humans, comprising administering the same to a subject in need of treatment. The pharmaceutical composition comprising, as an active ingredient, a AIMP2-DX2 gene or a vector comprising the gene has the effects of apoptosis inhibition, dyskinesia amelioration and oxidative stress inhibition and thus can be widely used for preventing and treating neuronal diseases such as Parkinson's disease and amyotrophic lateral sclerosis.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: July 21, 2020
    Assignee: GENEROATH CO., LTD
    Inventors: Jin Woo Choi, Dong Uk Lee, Ki Hwan Eum
  • Publication number: 20200201726
    Abstract: A controller comprises an error correction circuit configured to check an error bit number of error bits in the read data and correct the error bits; a read retry range setting circuit configured to reset a preset read retry range with respect to the read data, and set a new read retry range based on the error bit number and an error correction capability of the error correction circuit; a read voltage setting circuit configured to reset the set read voltage and set, as a new read voltage, a voltage among a plurality of voltages of the reset read retry range, corresponding to the new read retry range; and a flash control circuit configured to control the memory device to perform a read retry operation on the stored data, using the new read voltage.
    Type: Application
    Filed: July 2, 2019
    Publication date: June 25, 2020
    Inventors: Dong Uk LEE, Hun Wook LEE
  • Publication number: 20200181406
    Abstract: The present disclosure relates to a resin composition for vehicle parts, a vehicle part manufactured using the resin composition, and a method of manufacturing the vehicle part. Ultra-high molecular weight siloxane and an inorganic filler are mixed with an alloy resin of polyamide and polyethylene at an optimal rate in order to improve friction resistance and wear resistance while maintaining excellent impact resistance and low hygroscopicity. When a vehicle part is manufactured using the resin composition, it is possible to eliminate the application of silicone-based oil or to remarkably reduce the amount of silicone-based oil that is used, whereby it is possible to reduce manufacturing costs. Furthermore, ingredients that are harmful to human beings, such as POM, are not included, whereby it is possible to improve the quality of air in a vehicle.
    Type: Application
    Filed: May 13, 2019
    Publication date: June 11, 2020
    Inventors: Dong Uk Lee, Won Jin Seo, Sung Hyun Lee, Soon Joon Jung, Bong Joo Park, Jae Won Moon
  • Patent number: 10679703
    Abstract: The present disclosure relates to an electronic device. A storage device having improved reliability may include a memory device performing a program operation of storing data in selected memory cells, among a plurality of memory cells included in a memory block, and a memory controller controlling the memory device to perform a retention control operation of applying a retention control voltage to at least one source line coupled to a plurality of memory cell strings included in the memory block for a predetermined time duration when the program operation is completed.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: June 9, 2020
    Assignee: SK hynix Inc.
    Inventors: Dong Uk Lee, Se Chang Park