Patents by Inventor Douglas A. Hawks

Douglas A. Hawks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180339640
    Abstract: One embodiment of a trailer of the present invention includes a longitudinal member with a coupling assembly secured to the longitudinal member at one end and wheels secured to the longitudinal member at another end. The coupling assembly includes a first portion connectable to a vehicle so that when connected, the first portion is rotatable relative to the vehicle about a first axis that is approximately perpendicular to a ground surface below the vehicle. The coupling assembly further includes a second portion connected to the first portion and the longitudinal member. The second portion is rotatable relative to the first portion about a second axis. The second portion is further configured so that the longitudinal member is rotatable relative to the second portion of the coupling assembly about a third axis.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Inventors: Ed Shuttleworth, Douglas Hawk
  • Publication number: 20180233410
    Abstract: Wafer dicing methods that simplify the singulation process for certain types of integrated circuit (IC) wafer substrates that improve device reliability and die strength, reduce the width of the cutting kerf, reduce cost, and improve yield. A first method includes making ablative scribing cuts on the front side of a wafer substrate along cutting streets around the perimeter of IC dies, followed by stealth laser dicing through the backside of the wafer substrate and in substantial alignment with the ablative scribing cuts. A second method includes making stealth laser dicing through the backside of the wafer substrate and in substantial alignment with cutting streets around the perimeter of IC dies, followed by ablative scribing cuts on the front side of a wafer substrate along the cutting streets.
    Type: Application
    Filed: February 14, 2017
    Publication date: August 16, 2018
    Inventors: JOHN JAMES, SERGEI VORONOV, NIRMAL SHARMA, KIRBY KOETZ, VINCENT DEMAIORIBUS, DOUGLAS A. HAWKS
  • Patent number: 8368574
    Abstract: A Sigma-Delta analog-to-digital converter (ADC) having a direct time filter (DTF) in the feed-back path of the Sigma-Delta loop of the ADC. A Sigma-Delta ADC having a modified DTF in the feed-back path of the Sigma-Delta loop of the ADC is also disclosed. The ADC may also include a noise reduction block that splits an incoming RF signal, samples one of the split signals with a primary ADC, corrects for gain and delay inaccuracies and inverts the signal, applies the inverted signal to a primary digital-to-analog converter (DAC), combines the output of the DAC with the second split signal, which is then applied to a difference ADC.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: February 5, 2013
    Assignee: Omniphase Research Laboroatories, Inc.
    Inventor: Douglas Hawk
  • Patent number: 8304888
    Abstract: This document discusses, among other things, a semiconductor die package having a first and a second discrete components embedded into a dielectric substrate. An integrated circuit (IC) die is surface mounted on a first side of the dielectric substrate. The semiconductor die package includes a plurality of conductive regions on the second side of the dielectric substrate for mounting the semiconductor die package. A plurality of through hole vias couple the IC die to the first and second discrete components and the plurality of conductive regions.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: November 6, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Luke England, Douglas Hawks
  • Publication number: 20110147917
    Abstract: This document discusses, among other things, a semiconductor die package having a first and a second discrete components embedded into a dielectric substrate. An integrated circuit (IC) die is surface mounted on a first side of the dielectric substrate. The semiconductor die package includes a plurality of conductive regions on the second side of the dielectric substrate for mounting the semiconductor die package. A plurality of through hole vias couple the IC die to the first and second discrete components and the plurality of conductive regions.
    Type: Application
    Filed: December 22, 2009
    Publication date: June 23, 2011
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Luke England, Douglas Hawks
  • Publication number: 20040038451
    Abstract: Methods for forming the package are disclosed. The device package includes electrical connectors and an encapsulant. The package is formed by placing removable material over a portion of the connectors to prevent encapsulant attachment to the portions masked by the removable material.
    Type: Application
    Filed: August 26, 2003
    Publication date: February 26, 2004
    Inventors: Douglas A. Hawks, Siamak Fazelpour, Robbie Villanueva