Patents by Inventor Douglas Heckaman

Douglas Heckaman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6535397
    Abstract: An interconnect structure interconnects electronic modules and includes a backplane assembly formed from a substantially rigid backplane plate that carries RF connectors and a digital motherboard having digital connectors for mating with digital connectors of electronic modules. A controlled impedance interconnect circuit is positioned on the rear surface of the backplane plate and interconnects the RF connectors carried by the backplane plate and digital connectors of the digital motherboard. A rack receives the backplane assembly and supports a plurality of electronic modules that are interconnected to each other via the backplane assembly.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 18, 2003
    Assignee: Harris Corporation
    Inventors: William Clark, Douglas Heckaman, Edward Bajgrowicz
  • Publication number: 20020180554
    Abstract: An interconnect structure interconnects electronic modules and includes a backplane assembly formed from a substantially rigid backplane plate that carries RF connectors and a digital motherboard having digital connectors for mating with digital connectors of electronic modules. A controlled impedance interconnect circuit is positioned on the rear surface of the backplane plate and interconnects the RF connectors carried by the backplane plate and digital connectors of the digital motherboard. A rack receives the backplane assembly and supports a plurality of electronic modules that are interconnected to each other via the backplane assembly.
    Type: Application
    Filed: May 31, 2001
    Publication date: December 5, 2002
    Applicant: Harris Corporation
    Inventors: William Clark, Douglas Heckaman, Edward Bajgrowicz
  • Patent number: 5309125
    Abstract: A miniaturized cylindrical `channeline` delay line comprises a plurality of concentrically stacked cylindrical elements, surfaces of which are configured to form helically contoured `channeline` transmission line. The nested stack includes a first, generally cylindrical conductive spool body element, for example a lightweight and electrically conductive cylinder or spool, having a longitudinal axis and an outer, generally cylindrical surface in which a helical groove is formed. Concentrically surrounding this interior spool are one or more additional, generally cylindrical hollow electrically conductive hollow cylinders of successively increasing diameters. These additional electrically conductive hollow cylinders are sized, so that respective ones of the cylinders may be concentrically stacked about the longitudinal axis of the interior spool. Like the interior spool, each surrounding cylinder has a helical groove formed in its outer cylindrical surface.
    Type: Grant
    Filed: September 23, 1992
    Date of Patent: May 3, 1994
    Assignee: Harris Corporation
    Inventors: Gilbert R. Perkins, Douglas Heckaman
  • Patent number: 5272457
    Abstract: A high isolation broadband switching circuit includes a plurality of switching elements coupled in series alternatingly with transmission line segments. Each switching element has a low or very high impedance between first and second points responsive to first and second values of a control voltage, respectively. In a first embodiment, the switching element includes a PIN diode having a cathode coupled to a first transmission line and an anode coupled to a second transmission line. In a second embodiment, the switching element includes a field effect transistor (FET) having a drain coupled to a first transmission line and a source coupled to a second transmission line. A first resistor is coupled between the drain and the source for DC continuity between the drain and the source, and a second resistor coupled between a gate of the FET and ground for DC continuity. A bias voltage source is coupled through a resistor to one of a source and a drain of one of the FETs.
    Type: Grant
    Filed: March 10, 1992
    Date of Patent: December 21, 1993
    Assignee: Harris Corporation
    Inventors: Douglas Heckaman, Augusto E. Rodriguez, Jerry Schappacher
  • Patent number: 5218373
    Abstract: Directed millimeter wave radiation from internal elements of a microwave circuit through the housing cover, housing base, and side walls of a hermetically-sealed MMIC integrated subsystem assembly uses a waffle-wall array of conductive posts as a band rejection filter to provide walls which guide the radiated waves through a hermetically sealed window in the housing base for waveguide propagation or to a dielectric side wall or cover to radiate energy therethrough. For a waveguide launch, the launch probe is printed on a TEM mode microstrip transmission line substrate and is located over or on a dielectric window formed at the end of an air filled waveguide. A waveguide-like mode of propagation is launched perpendicular to the microstrip substrate and the energy is transmitted through the dielectric window into the air dielectric waveguide which extends through the housing base.
    Type: Grant
    Filed: October 1, 1990
    Date of Patent: June 8, 1993
    Assignee: Harris Corporation
    Inventors: Douglas Heckaman, Ronald Vought
  • Patent number: 5124677
    Abstract: A waffeline-configured, surface-mount transmission line module contains a two-dimensional arrangement of periodically distributed conductive surface mesas and channels. Within the channels are segments of dielectrically surrounded conductor. The geometry of the arrangement of segments among the waffleline channels is defined in accordance with the intended signal coupling functionality of the interconnect structure. For example, in the case of a signal splitting application, the conductor segments may be arranged in a tree-like configuration between an input port and multiple output ports. Isolation resistors may be disposed within the channels of the waffleline between adjacent locations of diverging conductor runs among the mesas of the waffleline.
    Type: Grant
    Filed: August 22, 1990
    Date of Patent: June 23, 1992
    Assignee: Harris Corporation
    Inventors: Douglas Heckaman, Diane G. Caruso
  • Patent number: 5065123
    Abstract: A two-dimensional periodic conductive post array structure is used to suppress higher order wave propagation within a large microstrip housing assembly without attentuating the desired TEM mode of propagation. Substantially vertical conductive posts are spaced at appropriate wavelength periods in the X and Y directions on top of and through a microstrip substrate in a so called "waffle-wall" type configuration. The periodic post structure provides high microwave signal isolation by functioning as a band rejection filter both above the microstrip substrate and within the substrate to isolate between nearby active and passive circuit functions located on the microstrip substrate. The desired TEM mode microstrip transmission line is routed through the conductive post matrix to provide the signal, control and DC paths between circuit chips and other active and passive circuit functions.
    Type: Grant
    Filed: October 1, 1990
    Date of Patent: November 12, 1991
    Assignee: Harris Corporation
    Inventors: Douglas Heckaman, Ronald Vought, Edward Caraway