Patents by Inventor Douglas La Tulipe
Douglas La Tulipe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250038132Abstract: A system may include an integrated circuit (IC) package. The IC package may include one or more IC die hosting one or more circuits, and an interposer. The interposer may be coupled to the one or more IC die via an interconnection layer. The interposer may include one or more electrically active devices configured to provide one or more security functions to secure the one or more circuits. The interposer may be coupled to a backside power of the IC package. In some embodiments, the backside power of the IC package may include one or more backside power delivery networks.Type: ApplicationFiled: July 28, 2023Publication date: January 30, 2025Applicant: The Charles Stark Draper Laboratory, Inc.Inventor: Douglas La Tulipe
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Patent number: 11841531Abstract: There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.Type: GrantFiled: July 29, 2022Date of Patent: December 12, 2023Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORKInventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
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Publication number: 20230244029Abstract: There is set forth herein a method including building a first photonics structure using, wherein the building the first photonics structure includes fabricating one or more photonics device.Type: ApplicationFiled: January 9, 2023Publication date: August 3, 2023Inventors: William CHARLES, Douglas COOLBAUGH, Douglas LA TULIPE, Gerald L. LEAKE, Jr.
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Patent number: 11550173Abstract: There is set forth herein an integrated photonics structure having a waveguide disposed within a dielectric stack of the integrated photonics structure, wherein the integrated photonics structure further includes a field generating electrically conductive structure disposed within the dielectric stack; and a heterogenous structure attached to the integrated photonics structure, the heterogenous structure having field sensitive material that is sensitive to a field generated by the field generating electrically conductive structure.Type: GrantFiled: November 18, 2020Date of Patent: January 10, 2023Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, GOVERNMENT OF THE UNITED STATES, AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE, MORTON PHOTONICS INCORPORATIONInventors: Douglas Coolbaugh, Douglas La Tulipe, Paul A. Morton, Nicholas G. Usechak
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Patent number: 11550099Abstract: There is set forth herein a method including building a first photonics structure using a first wafer having a first substrate, wherein the building the first photonics structure includes integrally fabricating within a first photonics dielectric stack one or more photonics device, the one or more photonics device formed on the first substrate; building a second photonics structure using a second wafer having a second substrate, wherein the building the second photonics structure includes integrally fabricating within a second photonics dielectric stack a laser stack structure active region and one or more photonics device, the second photonics dielectric stack formed on the second substrate; and bonding the first photonics structure and the second photonics structure to define an optoelectrical system having the first photonics structure bonded the second photonics structure.Type: GrantFiled: September 19, 2019Date of Patent: January 10, 2023Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORKInventors: William Charles, Douglas Coolbaugh, Douglas La Tulipe, Gerald L. Leake, Jr.
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Publication number: 20220381974Abstract: There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.Type: ApplicationFiled: July 29, 2022Publication date: December 1, 2022Applicant: The Research Foundation for The State University of New YorkInventors: Douglas COOLBAUGH, Douglas LA TULIPE, Gerald LEAKE
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Patent number: 11435523Abstract: There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.Type: GrantFiled: June 23, 2020Date of Patent: September 6, 2022Assignee: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORKInventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
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Patent number: 11029466Abstract: There is set forth herein a method including a substrate; a dielectric stack disposed on the substrate; one or more photonics device integrated in the dielectric stack; and a laser light source having a laser stack including a plurality of structures arranged in a stack, wherein structures of the plurality of structures are integrated in the dielectric stack, wherein the laser stack includes an active region configured to emit light in response to the application of electrical energy to the laser stack.Type: GrantFiled: September 19, 2019Date of Patent: June 8, 2021Assignees: The Research Foundation for the State University of New York, The Regents of the University of CaliforniaInventors: William Charles, John Bowers, Douglas Coolbaugh, Daehwan Jung, Jonathan Klamkin, Douglas La Tulipe, Gerald L. Leake, Jr., Songtao Liu, Justin Norman
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Patent number: 10976491Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.Type: GrantFiled: October 27, 2017Date of Patent: April 13, 2021Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK, ANALOG PHOTONICS, LLC, ARIZONA BOARD OF REGENTS ON BEHALF OF THE UNIVERSITY OF ARIZONAInventors: Douglas Coolbaugh, Michael Watts, Michal Lipson, Keren Bergman, Thomas Koch, Jeremiah Hebding, Daniel Pascual, Douglas La Tulipe
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Publication number: 20210072568Abstract: There is set forth herein an integrated photonics structure having a waveguide disposed within a dielectric stack of the integrated photonics structure, wherein the integrated photonics structure further includes a field generating electrically conductive structure disposed within the dielectric stack; and a heterogenous structure attached to the integrated photonics structure, the heterogenous structure having field sensitive material that is sensitive to a field generated by the field generating electrically conductive structure.Type: ApplicationFiled: November 18, 2020Publication date: March 11, 2021Inventors: Douglas COOLBAUGH, Douglas LA TULIPE, Paul A. MORTON, Nicholas G. USECHAK
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Patent number: 10877300Abstract: There is set forth herein an integrated photonics structure having a waveguide disposed within a dielectric stack of the integrated photonics structure, wherein the integrated photonics structure further includes a field generating electrically conductive structure disposed within the dielectric stack; and a heterogenous structure attached to the integrated photonics structure, the heterogenous structure having field sensitive material that is sensitive to a field generated by the field generating electrically conductive structure.Type: GrantFiled: April 3, 2019Date of Patent: December 29, 2020Assignees: THE RESEARCH FOUNDATION FOR THE STATE UNIVERSITY OF NEW YORK, GOVERNMENT OF THE UNITED STATES, AS REPRESENTED BY THE SECRETARY OF THE AIR FORCE, MORTON PHOTONICS INCORPORATEDInventors: Douglas Coolbaugh, Douglas La Tulipe, Paul A. Morton, Nicholas G. Usechak
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Publication number: 20200319403Abstract: There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.Type: ApplicationFiled: June 23, 2020Publication date: October 8, 2020Inventors: Douglas COOLBAUGH, Douglas LA TULIPE, Gerald LEAKE
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Patent number: 10698156Abstract: There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack.Type: GrantFiled: February 8, 2018Date of Patent: June 30, 2020Assignee: The Research Foundation for the State University of New YorkInventors: Douglas Coolbaugh, Douglas La Tulipe, Gerald Leake
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Publication number: 20200166720Abstract: There is set forth herein a method including building a first photonics structure using a first wafer having a first substrate, wherein the building the first photonics structure includes integrally fabricating within a first photonics dielectric stack one or more photonics device, the one or more photonics device formed on the first substrate; building a second photonics structure using a second wafer having a second substrate, wherein the building the second photonics structure includes integrally fabricating within a second photonics dielectric stack a laser stack structure active region and one or more photonics device, the second photonics dielectric stack formed on the second substrate; and bonding the first photonics structure and the second photonics structure to define an optoelectrical system having the first photonics structure bonded the second photonics structure.Type: ApplicationFiled: September 19, 2019Publication date: May 28, 2020Inventors: William CHARLES, Douglas COOLBAUGH, Douglas La Tulipe, Gerald L. LEAKE, JR.
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Publication number: 20200166703Abstract: There is set forth herein a method including a substrate; a dielectric stack disposed on the substrate; one or more photonics device integrated in the dielectric stack; and a laser light source having a laser stack including a plurality of structures arranged in a stack, wherein structures of the plurality of structures are integrated in the dielectric stack, wherein the laser stack includes an active region configured to emit light in response to the application of electrical energy to the laser stack.Type: ApplicationFiled: September 19, 2019Publication date: May 28, 2020Inventors: William CHARLES, John BOWERS, Douglas COOLBAUGH, Daehwan JUNG, Jonathan KLAMKIN, Douglas La Tulipe, Gerald L. LEAKE, JR., Songtao LIU, Justin NORMAN
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Publication number: 20180314003Abstract: There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack.Type: ApplicationFiled: February 8, 2018Publication date: November 1, 2018Inventors: Douglas Coolbaugh, Douglas La Tulipe, JR., Gerald Leake
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Publication number: 20180143374Abstract: In one embodiment an optoelectronic system can include a photonics interposer having a substrate and a functional interposer structure formed on the substrate, a plurality of through vias carrying electrical signals extending through the substrate and the functional interposer structure, and a plurality of wires carrying signals to different areas of the functional interposer structure. The system can further include one or more photonics device integrally formed in the functional interposer structure, and one or more prefabricated component attached to the functional interposer structure.Type: ApplicationFiled: October 27, 2017Publication date: May 24, 2018Inventors: Douglas COOLBAUGH, Michael WATTS, Michal LIPSON, Keren BERGMAN, Thomas KOCH, Jeremiah HEBDING, Daniel PASCUAL, Douglas LA TULIPE
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Publication number: 20070059922Abstract: The present invention relates to methods for post-etch, particularly post-RIE, removal of fluorocarbon-based residues from a hybrid dielectric structure. The hybrid dielectric structure contains a first dielectric material, and a line-level dielectric layer containing a second, different dielectric material, and wherein said second, different dielectric material comprises a polymeric thermoset dielectric material having a dielectric constant less than 4. Low energy electron beam or low temperature annealing is utilized by the present invention for removal of the fluorocarbon-based residues from such a hybrid dielectric structure, without damaging the low-k polymeric thermoset dielectric material contained in such a hybrid dielectric structure.Type: ApplicationFiled: September 13, 2005Publication date: March 15, 2007Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Lawrence Clevenger, Andrew Cowley, Timothy Dalton, Mark Hoinkis, Kaushik Kumar, Douglas La Tulipe, David Rath, Chih-Chao Yang
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Publication number: 20060292852Abstract: An interconnect structure in the back end of the line of an integrated circuit forms contacts between successive layers by removing material in the top surface of the lower interconnect in a cone-shaped aperture, the removal process extending through the liner of the upper aperture, and depositing a second liner extending down into the cone-shaped aperture, thereby increasing the mechanical strength of the contact, which then enhance the overall reliability of the integrated circuit.Type: ApplicationFiled: August 9, 2006Publication date: December 28, 2006Applicants: INTERNATIONAL BUSINESS MACHINES CORPORATION, INFINEON TECHNOLOGIES NORTH AMERICA CORP.Inventors: Lawrence Clevenger, Andrew Cowley, Timothy Dalton, Mark Hoinkis, Steffen Kaldor, Erdem Kaltalioglu, Kaushik Kumar, Douglas La Tulipe, Jochen Schacht, Andrew Simon, Terry Spooner, Yun-Yu Wang, Clement Wann, Chih-Chao Yang
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Publication number: 20060113278Abstract: A metal hardmask for use with a Dual Damascene process used in the manufacturing of semiconductor devices. The metal hardmask has advantageous translucent characteristics to facilitate alignment between levels while fabricating a semiconductor device and avoids the formation of metal oxide residue deposits. The metal hardmask comprises a first or primary layer of TiN (titanium nitride) and a second or capping layer of TaN (tantalum nitride).Type: ApplicationFiled: January 12, 2006Publication date: June 1, 2006Inventors: Kaushik Kumar, Lawrence Clevenger, Timothy Dalton, Douglas La Tulipe, Andy Cowley, Erdem Kaltalioglu, Jochen Schacht, Andrew Simon, Mark Hoinkis, Steffen Kaldor, Chih-Chao Yang