Patents by Inventor Du-ho Kim
Du-ho Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11884171Abstract: A low-voltage DC-DC converter (LDC) includes: an N-phase power circuit configured by connection of N DC-DC converters in parallel between a high-voltage (HV) battery and a low-voltage (LV) battery; and one output capacitor commonly connected to an output of each phase DC-DC converter. Each phase of the N-phase power circuit is controlled in an interleaving manner which delays a phase by 360°/N. Here, each N-phase power circuit is controlled by switching at a frequency of [(a frequency at which the parasitic resistance (equivalent series resistance (ESR)) of the output capacitor is minimized)/N]. The parasitic resistance of the output capacitor of the LDC can be minimized. Accordingly, a lifespan of a battery can be improved and efficiency of the DC-DC converter can be increased through the reduction of the equivalent series resistance (ESR) of the output capacitor.Type: GrantFiled: November 22, 2021Date of Patent: January 30, 2024Assignee: Hyundai Mobis Co., Ltd.Inventors: Ji Hoon Park, Deok Kwan Choi, Won Gon Kim, Kang Min Kim, Min Heo, Tae Ho Bang, Du Ho Kim, Hyun Woo Shim, Soo Min Jeon, A Ra Lee
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Patent number: 11870360Abstract: The bidirectional insulating DC-DC converter shares high/low voltage terminals, a cooling passage, a housing, and a control board, and two independent step-down circuit (10) and step-up circuit (20) are formed in parallel to perform a bidirectional DC power conversion. A high voltage applied from a high voltage battery HV is stepped down through the step-down circuit (10) and output to a low voltage battery LV. On the other hand, a low voltage applied from the low voltage battery LV is stepped up through the step-up circuit (20) and output to the high voltage battery HV. The step-down circuit (10) is formed as an active clamp forward converter circuit, and the step-up circuit (20) is formed as an active clamp flyback converter circuit.Type: GrantFiled: December 15, 2021Date of Patent: January 9, 2024Assignee: HYUNDAI MOBIS CO., LTD.Inventors: Du Ho Kim, Deok Kwan Choi, Min Heo, Kang Min Kim, Soo Min Jeon, A Ra Lee, Won Gon Kim, Ji Hoon Park, Hyun Woo Shim, Tae Ho Bang
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Patent number: 11757364Abstract: The present disclosure relates to a new bidirectional low voltage DC-DC converter (LDC), that is, a DC-DC converter capable of satisfying a safety level required for an eco-friendly vehicle and an autonomous vehicle and improving power conversion performance, and a method and an apparatus for controlling the same. The LDC proposed in the present disclosure is a new concept bidirectional LDC in which a plurality of converters having the same power circuit topology are subjected to a parallel interleaving operation so as to enable both a buck operation and a boost operation, satisfy a high safety level, and improve power conversion performance. To this end, a plurality of bidirectional active-clamp flyback converters (for example, two or more bidirectional active-clamp flyback converters) are connected in parallel and are interleaved and controlled by a controller (for example, a microcomputer).Type: GrantFiled: November 22, 2021Date of Patent: September 12, 2023Assignee: HYUNDAI MOBIS Co., Ltd.Inventors: Hyun Woo Shim, Deok Kwan Choi, Won Gon Kim, Min Heo, Kang Min Kim, A Ra Lee, Tae Ho Bang, Ji Hoon Park, Du Ho Kim, Soo Min Jeon
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Patent number: 11431253Abstract: A Low-voltage DC-DC Converter (LDC) includes a new bidirectional isolated LDC, in which two converters with different power circuit topologies operate in parallel in order to enable both buck mode and boost mode. The two applied converters are a phase-shift full-bridge converter with full-bridge synchronous rectification and an active-clamp forward converter. According to the present invention, it is possible to achieve the advantages of both a phase-shifted full-bridge converter with full-bridge synchronous rectification applied and an active clamping forward converter. Thus, it is possible to minimize output voltage and current ripples, thereby improving the quality of the LDC output power while minimizing electromagnetic waves generated while a product is operating.Type: GrantFiled: December 31, 2020Date of Patent: August 30, 2022Assignee: HYUNDAI MOBIS Co., Ltd.Inventors: Won Gon Kim, Deok Kwan Choi, Kang Min Kim, Min Heo, A Ra Lee, Tae Ho Bang, Hyun Woo Shim, Du Ho Kim, Soo Min Jeon, Ji Hoon Park
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Publication number: 20220200454Abstract: Provided is a new LDC to satisfy the recent requirements for a bidirectional large-capacity isolated LDC (DC-DC converter). The present disclosure provides a new bidirectional isolated LDC, in which two converters with different power circuit topologies operate in parallel in order to enable both buck mode and boost mode. The two applied converters are a phase-shift full-bridge converter with full-bridge synchronous rectification and an active-clamp forward converter. According to the present invention, it is possible to achieve the advantages of both a phase-shifted full-bridge converter with full-bridge synchronous rectification applied and an active clamping forward converter. Thus, it is to possible to minimize output voltage and current ripples, thereby improving the quality of the LDC output power while minimizing electromagnetic waves generated while a product is operating.Type: ApplicationFiled: December 31, 2020Publication date: June 23, 2022Inventors: Won Gon Kim, Deok Kwan Choi, Kang Min Kim, Min Heo, A Ra Lee, Tae Ho Bang, Hyun Woo Shim, Du Ho Kim, Soo Min Jeon, Ji Hoon Park
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Publication number: 20220190734Abstract: The bidirectional insulating DC-DC converter shares high/low voltage terminals, a cooling passage, a housing, and a control board, and two independent step-down circuit (10) and step-up circuit (20) are formed in parallel to perform a bidirectional DC power conversion. A high voltage applied from a high voltage battery HV is stepped down through the step-down circuit (10) and output to a low voltage battery LV. On the other hand, a low voltage applied from the low voltage battery LV is stepped up through the step-up circuit (20) and output to the high voltage battery HV. The step-down circuit (10) is formed as an active clamp forward converter circuit, and the step-up circuit (20) is formed as an active clamp flyback converter circuit.Type: ApplicationFiled: December 15, 2021Publication date: June 16, 2022Applicant: HYUNDAI MOBIS Co., Ltd.Inventors: Du Ho Kim, Deok Kwan Choi, Min Heo, Kang Min Kim, Soo Min Jeon, A Ra Lee, Won Gon Kim, Ji Hoon Park, Hyun Woo Shim, Tae Ho Bang
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Publication number: 20220165490Abstract: An aspect of the present disclosure provides a bus bar as a winding in a core of a transformer includes multiple sub-bars arranged horizontally and connected in parallel so as to minimize an AC current in the transformer, and the sub-bars have different widths and thus resistances or impedances with respect to a current flowing through the sub-bars are the same. Another aspect of the present disclosure provides a method of designing a bus bar for resistance or impedance matching between multiple sub-bars included in the bus bar to share a current to minimize an AC current in the transformer. Another aspect of the present disclosure provides a transformer, for a DC-DC converter for use in a vehicle, which is manufactured by the method of designing a bus bar.Type: ApplicationFiled: November 23, 2021Publication date: May 26, 2022Applicant: HYUNDAI MOBIS Co., Ltd.Inventors: Tae Ho BANG, Deok Kwan CHOI, Won Gon KIM, Min HEO, Ji Hoon PARK, Kang Min KIM, A Ra LEE, Hyun Woo SHIM, Du Ho KIM, Soo Min JEON
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Publication number: 20220166310Abstract: Provided is an electro-magnetic compatibility (EMC) filter including a lower bobbin having a U-shaped cross-sectional shape, a lower core including a magnetic material having a U-shaped cross-sectional shape and disposed on the lower bobbin, a bus bar disposed on the lower core, an upper bobbin having a hollow inside, having a hexahedral shape with one side open, and configured to cover an upper portion of the lower bobbin, and an upper core including a magnetic material having a plate-like shape, disposed in an internal space of the upper bobbin, and disposed on the lower core (U core) to cover the bus bar with a gap maintained by the bus bar between the upper and lower cores when the lower bobbin and the upper bobbin are coupled to each other.Type: ApplicationFiled: November 19, 2021Publication date: May 26, 2022Applicant: HYUNDAI MOBIS Co., Ltd.Inventors: Tae Ho BANG, Ji Hoon PARK, Hyun Woo SHIM, Du Ho KIM, Soo Min JEON, Deok Kwan CHOI, Won Gon KIM, Min HEO, Kang Min KIM, A Ra LEE
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Publication number: 20220166332Abstract: The present disclosure relates to a new bidirectional low voltage DC-DC converter (LDC), that is, a DC-DC converter capable of satisfying a safety level required for an eco-friendly vehicle and an autonomous vehicle and improving power conversion performance, and a method and an apparatus for controlling the same. The LDC proposed in the present disclosure is a new concept bidirectional LDC in which a plurality of converters having the same power circuit topology are subjected to a parallel interleaving operation so as to enable both a buck operation and a boost operation, satisfy a high safety level, and improve power conversion performance. To this end, a plurality of bidirectional active-clamp flyback converters (for example, two or more bidirectional active-clamp flyback converters) are connected in parallel and are interleaved and controlled by a controller (for example, a microcomputer).Type: ApplicationFiled: November 22, 2021Publication date: May 26, 2022Applicant: HYUNDAI MOBIS Co., Ltd.Inventors: Hyun Woo SHIM, Deok Kwan CHOI, Won Gon KIM, Min HEO, Kang Min KIM, A Ra LEE, Tae Ho BANG, Ji Hoon PARK, Du Ho KIM, Soo Min JEON
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Publication number: 20220161672Abstract: The present disclosure is for minimizing the parasitic resistance of an output capacitor of a low-voltage DC-DC converter (LDC) proposed to improve a lifespan of a battery and increase efficiency of the DC-DC converter through reduction of an equivalent series resistance (ESR) of an output capacitor in an N-phase interleaving type vehicle DC-DC converter. According to the present disclosure, the LDC includes: an N-phase power circuit configured by connection of N DC-DC converters in parallel between a high-voltage (HV) battery and a low-voltage (LV) battery; and one output capacitor commonly connected to an output of each phase DC-DC converter, wherein each phase of the N-phase power circuit is controlled in an interleaving manner which delays a phase by 360°/N. Here, each N-phase power circuit is controlled by switching at a frequency of [(a frequency at which the parasitic resistance (equivalent series resistance (ESR)) of the output capacitor is minimized)/N].Type: ApplicationFiled: November 22, 2021Publication date: May 26, 2022Applicant: HYUNDAI MOBIS Co., Ltd.Inventors: Ji Hoon PARK, Deok Kwan CHOI, Won Gon KIM, Kang Min KIM, Min HEO, Tae Ho BANG, Du Ho KIM, Hyun Woo SHIM, Soo Min JEON, A Ra LEE
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Patent number: 11329570Abstract: The present disclosure relates to a high electric power density bidirectional isolated low voltage DC-DC converter (LDC) assembly, in which a large-capacity bidirectional isolated LDC circuit is packaged in consideration of a flow of electric power so as to use components in common and minimize an internal dead space, and a cooling structure thereof. LDC assembly includes a power board subassembly (100) including the high voltage stage, a part of the buck circuit, and the boost circuit; a transformer subassembly (200) including a transformer of the buck circuit; an output power board subassembly (300) including a part of the buck circuit; and an EMC filter subassembly (400) including an EMC filter included in the low voltage stage.Type: GrantFiled: December 28, 2020Date of Patent: May 10, 2022Assignee: HYUNDAI MOBIS CO., LTD.Inventors: Min Heo, Ji Hoon Park, Du Ho Kim, Soo Min Jeon, Deok Kwan Choi, Won Gon Kim, Kang Min Kim, A Ra Lee, Tae Ho Bang, Hyun Woo Shim
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Patent number: 9800250Abstract: Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.Type: GrantFiled: August 15, 2016Date of Patent: October 24, 2017Assignee: Samsung Electronics Co., Ltd.Inventor: Du-ho Kim
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Publication number: 20160352340Abstract: Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.Type: ApplicationFiled: August 15, 2016Publication date: December 1, 2016Inventor: Du-ho Kim
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Patent number: 9444472Abstract: Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.Type: GrantFiled: July 2, 2014Date of Patent: September 13, 2016Assignee: Samsung Electronics Co., Ltd.Inventor: Du-ho Kim
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Patent number: 9436213Abstract: Provided is a clock data recovery circuit including a phase-frequency detector configured to detect a frequency and phase of a reference clock signal and control a frequency and phase of an internal clock signal based on the detected frequency, a frequency detector configured to detect a frequency of a data signal and, based on the detected frequency of the data signal, adjust the frequency of the internal clock signal; and a phase detector configured to detect a phase of the data signal based on the detected frequency of the data signal and adjust the phase of the internal clock signal. Accordingly, a timing controller that includes the clock data recovery circuit is capable of establishing data communication at high speeds when the system is powered on/off to reduce power consumption. Also, the timing controller does not need to include an additional external clock generation device, and is capable of achieving frequency synchronization using a non-precision clock signal generated in the timing controller.Type: GrantFiled: March 19, 2014Date of Patent: September 6, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Du-Ho Kim, Jong-Shin Shin
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Publication number: 20150061779Abstract: Provided are a digitally controlled oscillator and an electronic device including the digitally controlled oscillator. The digitally controlled oscillator includes a digital control unit and a power control oscillation unit. The digital control unit compensates for a difference between a feedback signal of an output power and a reference power set based on an input digital control signal and outputting an output power. The power control oscillation unit receives a signal related to the output power, and generates an output clock having an oscillation frequency in response to the signal related to the output power.Type: ApplicationFiled: July 2, 2014Publication date: March 5, 2015Inventor: Du-ho Kim
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Publication number: 20150033060Abstract: Provided is a clock data recovery circuit including a phase-frequency detector configured to detect a frequency and phase of a reference clock signal and control a frequency and phase of an internal clock signal based on the detected frequency, a frequency detector configured to detect a frequency of a data signal and, based on the detected frequency of the data signal, adjust the frequency of the internal clock signal; and a phase detector configured to detect a phase of the data signal based on the detected frequency of the data signal and adjust the phase of the internal clock signal. Accordingly, a timing controller that includes the clock data recovery circuit is capable of establishing data communication at high speeds when the system is powered on/off to reduce power consumption. Also, the timing controller does not need to include an additional external clock generation device, and is capable of achieving frequency synchronization using a non-precision clock signal generated in the timing controller.Type: ApplicationFiled: March 19, 2014Publication date: January 29, 2015Inventors: DU-HO KIM, JONG-SHIN SHIN
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Patent number: 8799619Abstract: Disclosed herein are a method, a system, and a computer-readable recording medium for providing distributed programming environment by using a distributed space. According to an aspect of the present invention, there is provided a method for processing data in distributed environment, the method including: generating a virtual space using resources provided by a plurality of nodes; and reading or writing data from or in the virtual space by a first application, wherein the data are mapped to a specific location region on the virtual space determined according to attributes of the data and the first application performs a reading operation or a writing operation for the data in the location region.Type: GrantFiled: April 17, 2009Date of Patent: August 5, 2014Assignee: NHN CorporationInventors: Woo Hyun Kim, Du-Ho Kim, Tae Il Yun
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Publication number: 20120030446Abstract: Disclosed herein are a method, a system, and a computer-readable recording medium for providing distributed programming environment by using a distributed space. According to an aspect of the present invention, there is provided a method for processing data in distributed environment, the method including: generating a virtual space using resources provided by a plurality of nodes; and reading or writing data from or in the virtual space by a first application, wherein the data are mapped to a specific location region on the virtual space determined according to attributes of the data and the first application performs a reading operation or a writing operation for the data in the location region.Type: ApplicationFiled: April 17, 2009Publication date: February 2, 2012Applicant: NHN CORPORATIONInventors: Woo Hyun Kim, Du-Ho Kim, Tae II Yun
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Patent number: 7881417Abstract: A demodulation method using phase detection and an apparatus thereof are provided. The demodulation method includes detecting phase information by sampling a received signal, synchronizing at least one clock signal by using the detected phase information, oversampling the received signal by the synchronized clock signal, and demodulating the received signal by using the oversampled result. With this, the demodulating apparatus can demodulate the modulated signal by using the phase detection, and use a digital filter as a filter for removing a jitter from the demodulated signal, thereby allowing a size thereof to be minimized.Type: GrantFiled: August 10, 2007Date of Patent: February 1, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Hyun-chin Kim, Woo-young Choi, Young-kwang Seo, Du-ho Kim