Abstract: An image sensor pixel, and image sensor, and a method of fabricating the same is disclosed. The image pixel includes a photosensitive capacitor and a transistor network. The photosensitive capacitor includes an electrode, a conductive layer, a dielectric layer, and a photosensitive semiconductor material. The conductive layer is disposed around the electrode and the dielectric layer is formed between the conductive layer and the electrode. The photosensitive semiconductor material is for generating an image signal in response to image light and is disposed between the dielectric layer and the electrode. The transistor network is coupled to readout the image signal from the electrode of the photosensitive capacitor.

Abstract: A color filter array includes a plurality of tiled minimal repeating units, each minimal repeating unit comprising an M×N set of individual filters. Each minimal repeating unit includes a plurality of imaging filters including individual filters having at least first, second, and third photoresponses, and at least one reference filter having a reference photoresponse, wherein the reference filter is positioned among the imaging filters and wherein the reference photoresponse transmits substantially the crosstalk spectrum that is not filtered from light incident on the color filter array by the plurality of imaging filters. Other embodiments are disclosed and claimed.

Abstract: A storage transistor with a storage region is disposed in a semiconductor material. A gate electrode is disposed in a bottom side of an interlayer proximate to the storage region, and a dielectric layer is disposed between the storage region and the gate electrode. An optical isolation structure is disposed in the interlayer and the optical isolation structure extends from a top side of the interlayer to the gate electrode. The optical isolation structure is also adjoining a perimeter of the gate electrode and contacts the gate electrode. A capping layer is disposed proximate to the top side of the interlayer and the capping layer caps a volume encircled by the optical isolation structure.

Abstract: A back side illuminated image sensor includes a semiconductor material having a front side and a back side. The semiconductor material is disposed between image sensor circuitry and a light filter array. The image sensor circuitry is disposed on the front side, and the light filter array is disposed proximate to the back side. The image sensor includes a first pixel with a first doped region that extends from the image sensor circuitry into the semiconductor material a first depth. The first pixel also includes a second doped region that is disposed between the back side of the semiconductor material and the first doped region. The second doped region is electrically isolated from the first doped region. A second pixel with a third doped region is also included in the image sensor. The third doped region extends from the image sensor circuitry into the semiconductor material a second depth.

Abstract: An image sensor pixel, and image sensor, and a method of fabricating the same is disclosed. The image pixel includes a photosensitive capacitor and a transistor network. The photosensitive capacitor includes an electrode, a conductive layer, a dielectric layer, and a photosensitive semiconductor material. The conductive layer is disposed around the electrode and the dielectric layer is formed between the conductive layer and the electrode. The photosensitive semiconductor material is for generating an image signal in response to image light and is disposed between the dielectric layer and the electrode. The transistor network is coupled to readout the image signal from the electrode of the photosensitive capacitor.

Abstract: A method of fabricating an image system includes forming a first wafer that includes a first semiconductor substrate and a first interconnect layer. A pixel array is formed in an imaging region of the first semiconductor substrate and a first insulation-filled trench is formed in a peripheral circuit region of the first semiconductor substrate. Additionally, a second wafer is formed that includes a second semiconductor substrate and a second interconnect layer. A second insulation-filled trench is formed in a second semiconductor substrate, and the first wafer is bonded to the second wafer. A third interconnect layer of a third wafer is bonded to the second wafer. At least one deep via cavity is formed through the first and second interconnect layers and through the first and second insulation-filled trenches. The at least one deep via cavity is filled with a conductive material to form a deep via.

Abstract: A pixel cell includes a storage transistor disposed in a semiconductor substrate. The storage transistor includes a storage gate disposed over the semiconductor substrate, and a storage gate implant that is annealed and has a gradient profile in the semiconductor substrate under the storage transistor gate to store image charge accumulated by a photodiode disposed in the semiconductor substrate. A transfer transistor is disposed in the semiconductor substrate and is coupled between the photodiode and an input of the storage transistor to selectively transfer the image charge from the photodiode to the storage transistor. The transfer transistor includes a transfer gate disposed over the semiconductor substrate. An output transistor is coupled to an output of the storage transistor to selectively transfer the image charge from the storage transistor to a read out node. The output transistor includes an output gate disposed over the semiconductor substrate.

Abstract: A back side illuminated image sensor includes a pixel array including semiconductor material, and image sensor circuitry disposed on a front side of the semiconductor material to control operation of the pixel array. A first pixel includes a first doped region disposed proximate to a back side of the semiconductor material and extends into the semiconductor material a first depth to reach the image sensor circuitry. A second pixel with a second doped region is disposed proximate to the back side of the semiconductor material and extends into the semiconductor material a second depth which is less than the first depth. A third doped region is disposed between the second doped region and the image sensor circuitry front side of the semiconductor material. The third doped region is electrically isolated from the first doped region and the second doped region.

Abstract: A storage transistor with a storage region is disposed in a semiconductor material. A gate electrode is disposed in a bottom side of an interlayer proximate to the storage region, and a dielectric layer is disposed between the storage region and the gate electrode. An optical isolation structure is disposed in the interlayer and the optical isolation structure extends from a top side of the interlayer to the gate electrode. The optical isolation structure is also adjoining a perimeter of the gate electrode and contacts the gate electrode. A capping layer is disposed proximate to the top side of the interlayer and the capping layer caps a volume encircled by the optical isolation structure.

Abstract: A back side illuminated image sensor includes a semiconductor material having a front side and a back side. The semiconductor material is disposed between image sensor circuitry and a light filter array. The image sensor circuitry is disposed on the front side, and the light filter array is disposed proximate to the back side. The image sensor includes a first pixel with a first doped region that extends from the image sensor circuitry into the semiconductor material a first depth. The first pixel also includes a second doped region that is disposed between the back side of the semiconductor material and the first doped region. The second doped region is electrically isolated from the first doped region. A second pixel with a third doped region is also included in the image sensor. The third doped region extends from the image sensor circuitry into the semiconductor material a second depth.

Abstract: A method of fabricating an image sensor includes forming a pixel array in an imaging region of a semiconductor substrate and forming a trench in a peripheral region of the semiconductor substrate after forming the pixel array. The peripheral region is on a perimeter of the imaging region. The trench is filled with an insulating material. An interconnect layer is formed after filling the trench with insulating material. A first wafer is bonded to a second wafer. The first wafer includes the interconnect layer and the semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the insulating material. A via cavity is formed through the insulating material. The via cavity extends down to a second interconnect layer of the second wafer. The via cavity is filled with a conductive material to form a via. The insulating material insulates the conductive material from the semiconductor substrate.

Abstract: A color filter array for use on a color image sensor includes an oxide grid having sidewalls arranged to define openings in the oxide grid. Each one of the openings is to be disposed over a corresponding pixel cell of the color image sensor. Oxide support structures are disposed in an interior region of each opening in the oxide grid over a corresponding pixel cell of the color image sensor. The openings in the oxide grid are filled with color filter material of a corresponding color filter. A surface tension between each oxide support structure and the surrounding color filter material of the color filter is adapted to provide uniform thickness for the color filters within the corresponding openings in the oxide grid.

Abstract: A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.

Abstract: An image sensor includes a plurality of photosensitive devices arranged in a semiconductor substrate. A planar layer is disposed over the plurality of photosensitive devices in the semiconductor substrate. A plurality of first microlenses comprised of a lens material is arranged in first lens regions on the planar layer. A plurality of lens barriers comprised of the lens material is arranged on the planar layer to provide boundaries that define second lens regions on the planar layer. A plurality of second microlenses comprised of the lens material is formed within the boundaries provided by the plurality of lens barriers that define the second lens regions on the planar layer. The plurality of lens barriers are integrated with respective second microlenses after a reflow process of the plurality of second microlenses.

Abstract: A method of fabricating an image sensor includes forming a pixel array in an imaging region of a semiconductor substrate and forming a trench in a peripheral region of the semiconductor substrate after forming the pixel array. The peripheral region is on a perimeter of the imaging region. The trench is filled with an insulating material. An interconnect layer is formed after filling the trench with insulating material. A first wafer is bonded to a second wafer. The first wafer includes the interconnect layer and the semiconductor substrate. A backside of the semiconductor substrate is thinned to expose the insulating material. A via cavity is formed through the insulating material. The via cavity extends down to a second interconnect layer of the second wafer. The via cavity is filled with a conductive material to form a via. The insulating material insulates the conductive material from the semiconductor substrate.

Abstract: An image sensor pixel for use in a high dynamic range image sensor includes a first photodiode, a plurality of photodiodes, a shared floating diffusion region, a first transfer gate, and a second transfer gate. The first photodiode is disposed in a semiconductor material. The first photodiode has a first light exposure area and a first doping concentration. The plurality of photodiodes is also disposed in the semiconductor material. Each photodiode in the plurality of photodiodes has the first light exposure area and the first doping concentration. The first transfer gate is coupled to transfer first image charge from the first photodiode to the shared floating diffusion region. The second transfer gate is coupled to transfer distributed image charge from each photodiode in the plurality of photodiodes to the shared floating diffusion region.

Abstract: An image sensor includes a plurality of photodiodes disposed proximate to a frontside of a first semiconductor layer to accumulate image charge in response to light directed into the frontside of the first semiconductor layer. A plurality of pinning wells is disposed in the first semiconductor layer. The pinning wells separate individual photodiodes included in the plurality of photodiodes. A plurality of dielectric layers is disposed proximate to a backside of the first semiconductor layer. The dielectric layers are tuned such that light having a wavelength substantially equal to a first wavelength included in the light directed into the frontside of the first semiconductor layer is reflected from the dielectric layers back to a respective one of the plurality of photodiodes disposed proximate to the frontside of the first semiconductor layer.

Abstract: A color filter array includes a plurality of tiled minimal repeating units, each minimal repeating unit comprising an M×N set of individual filters. Each minimal repeating unit includes a plurality of imaging filters including individual filters having at least first, second, and third photoresponses, and at least one reference filter having a reference photoresponse, wherein the reference filter is positioned among the imaging filters and wherein the reference photoresponse transmits substantially the crosstalk spectrum that is not filtered from light incident on the color filter array by the plurality of imaging filters. Other embodiments are disclosed and claimed.

Abstract: An image sensor pixel including a photodiode includes a first dopant region disposed within a semiconductor layer and a second dopant region disposed above the first dopant region and within the semiconductor layer. The second dopant region contacts the first dopant region and the second dopant region is of an opposite majority charge carrier type as the first dopant region. A third dopant region is disposed above the first dopant region and within the semiconductor layer. The third dopant region is of a same majority charge carrier type as the second dopant region but has a greater concentration of free charge carriers than the second dopant region. A transfer gate is positioned to transfer photogenerated charge from the photodiode. The second dopant region extends closer to an edge of the transfer gate than the third dopant region.

Abstract: A pixel cell includes a photodiode disposed within a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode. A transfer transistor is disposed within the first semiconductor chip and coupled to the photodiode to transfer the image charge from the photodiode. A bias voltage generation circuit disposed within a second semiconductor chip for generating a bias voltage. The bias voltage generation circuit is coupled to the first semiconductor chip to bias the photodiode with the bias voltage. The bias voltage is negative with respect to a ground voltage of the second semiconductor chip. A floating diffusion is disposed within the second semiconductor chip. The transfer transistor is coupled to transfer the image charge from the photodiode on the first semiconductor chip to the floating diffusion on the second semiconductor chip.