Patents by Inventor Eduardo Martinez

Eduardo Martinez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8212617
    Abstract: A system for a Class AB Amplifier output stage that includes a first push pull system connected to an output terminal including a first driving transistor coupled to the output terminal and a second push pull system connected to the output terminal including a second driving transistor coupled to the output terminal. The amplifier also includes a current mode amplifier where the current mode amplifier's output is coupled to the first driving transistor's gate. The amplifier further includes a pair of resistors, a first resistor coupled to a first input terminal of the current mode amplifier, a second resistor coupled to a second input terminal of the current mode amplifier and coupled to the second driving transistor.
    Type: Grant
    Filed: January 5, 2010
    Date of Patent: July 3, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Alberto Marinas, Santiago Iriarte, Colm Donovan, Eduardo Martinez
  • Patent number: 8156674
    Abstract: A frame block for use in displaying typically flat planar rectangular objects such as photographs comprises two parallel planar areas, at least one such area having a plurality of grooves and associated ridges. The grooves and ridges each have a predetermined width and an associated length. The grooves are cut into a surface of the frame block and have a predetermined depth for receiving a clear plastic protector frame for an object to be displayed. The grooves and ridges form an area for display in which a two- or three-sided clear plastic protector frame may be mounted, each of which protects the object to the displayed. When standing on a side with the grooves horizontally aligned to said side, the frame block area is adapted to receive a three-sided protector and associated object at a location within the area selected by a user, two opposite sides of the three-sided protector being received into two horizontally aligned grooves.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: April 17, 2012
    Inventor: Sergio Eduardo Martinez, Jr.
  • Publication number: 20120052762
    Abstract: In one aspect of the present invention, a toy arrangement involving a flickering, animated and/or luminescent toy object will be described. The toy arrangement includes a toy object having an ultraviolet sensitive layer. A light source is arranged to illuminate the ultraviolet sensitive layer with ultraviolet light. The ultraviolet sensitive layer is arranged to emit colored light in response to exposure to the ultraviolet light. In some implementations, the light source is arranged to vary the intensity of the ultraviolet light, which in turn can cause the colored light emitted from the toy object to fade, brighten and flicker. The toy arrangement may also include a speaker that emits sounds that are synchronized with changes in the colored light.
    Type: Application
    Filed: August 29, 2011
    Publication date: March 1, 2012
    Applicant: FUNFARE, LLC
    Inventors: Jason Gene Heller, Charles Albert, Joshua William Garrett, Jeff McKnight, Eduardo Martinez
  • Patent number: 8076297
    Abstract: The present invention is related to a composition capable of inhibiting the growth of tumoral cells of different histological origins and of activated endothelial cells. The components of said compositions are polypeptide fragments of the serralisins, corresponding to the C-terminal fragment, from the internal metionine trough the end of the molecule, which could be combined among them and optionally with the prodigiosins that potentiate the antitumoral effect of the composition. The prodigiosins in the composition could be at a concentration of 0.1-100 nM. The anti-proliferative action of this composition is mediated by apoptotic mechanism. It's “in vivo” administration has antitumoral, antiangiogenic and protective effect against malignant tumors.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: December 13, 2011
    Assignee: Centro De Ingenieria Genetica Y Biotecnologia
    Inventors: Maria del Carmen Abrahantes Pérez, Jesús Reyes González, Gloria Véliz Rios, Eduardo Martinez Diaz, Caridad Anais Gasmuri González, José Garcia Suárez, Mónica Bequet Romero, Luis Javier González López, Lila Rosa Castellanos Serra, Manuel Selman-Housein Sosa, Raúl Gómez Riera, Jorge Victor Gavilondo Cowley
  • Publication number: 20110218138
    Abstract: The present invention is related to a composition capable of inhibiting the growth of tumoral cells of different histological origins and of activated endothelial cells. The components of said compositions are polypeptide fragments of the serralisins, corresponding to the C-terminal fragment, from the internal metionine trough the end of the molecule, which could be combined among them and optionally with the prodigiosins that potentiate the antitumoral effect of the composition. The prodigiosins in the composition could be at a concentration of 0.1-100 nM. The anti-proliferative action of this composition is mediated by apoptotic mechanism. It's “in vivo” administration has antitumoral, antiangiogenic and protective effect against malignant tumors.
    Type: Application
    Filed: July 5, 2005
    Publication date: September 8, 2011
    Inventors: María Del Carmen Abrahantes Pérez, Jesús Reyes González, Gloria Véliz Rios, Eduardo Martínez Díaz, Caridad Anais Gasmuri González, José Garcia Suárez, Mónica Bequet Romero, Luis Javier González López, Lisa Rosa Castellanos Serra, Manuel Selman-Housein Sosa, Raúl Gómez Riera, Jorge Victor Gavilondo Cowley
  • Publication number: 20110163811
    Abstract: A system for a Class AB Amplifier output stage that includes a first push pull system connected to an output terminal including a first driving transistor coupled to the output terminal and a second push pull system connected to the output terminal including a second driving transistor coupled to the output terminal. The amplifier also includes a current mode amplifier where the current mode amplifier's output is coupled to the first driving transistor's gate. The amplifier further includes a pair of resistors, a first resistor coupled to a first input terminal of the current mode amplifier, a second resistor coupled to a second input terminal of the current mode amplifier and coupled to the second driving transistor.
    Type: Application
    Filed: January 5, 2010
    Publication date: July 7, 2011
    Applicant: ANALOG DEVICES, INC.
    Inventors: Alberto MARINAS, Santiago IRIARTE, Colm DONOVAN, Eduardo MARTINEZ
  • Publication number: 20110154659
    Abstract: Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.
    Type: Application
    Filed: January 4, 2011
    Publication date: June 30, 2011
    Applicant: ORACLE AMERICA, INC.
    Inventors: James David Britton, Jorge Eduardo Martinez-Vargas, JR.
  • Publication number: 20110088303
    Abstract: A frame block for use in displaying typically flat planar rectangular objects such as photographs comprises two parallel planar areas, at least one such area having a plurality of grooves and associated ridges. The grooves and ridges each have a predetermined width and an associated length. The grooves are cut into a surface of the frame block and have a predetermined depth for receiving a clear plastic protector frame for an object to be displayed. The grooves and ridges form an area for display in which a two- or three-sided clear plastic protector frame may be mounted, each of which protects the object to the displayed. When standing on a side with the grooves horizontally aligned to said side, the frame block area is adapted to receive a three-sided protector and associated object at a location within the area selected by a user, two opposite sides of the three-sided protector being received into two horizontally aligned grooves.
    Type: Application
    Filed: October 21, 2009
    Publication date: April 21, 2011
    Inventor: Sergio Eduardo Martinez, JR.
  • Publication number: 20110061233
    Abstract: Systems and methods for providing mechanically reinforced plated through-holes (PTH) in PCBs, which advantageously allow improved soldering capabilities and reliability, are described herein. Such systems and methods are achieved by reducing the heat sinking effects of PTHs by providing one or more vias surrounding the PTHs to provide an electrical connection between the PTH and the internal and bottom conductive layers of a PCB. In this regard, the PTHs are spaced apart from at least one of the internal conductive layers (e.g., ground or power layers), so the heat sinking effects are reduced. This feature enables molten solder to substantially fill the entire PTH before freezing, thereby improving the mechanical and electrical connection between an electrical component and the PCB. One or more electrically-nonfunctional lands (or “rib reinforcements”) are provided in internal conductive layers to mechanically support the walls of the PCB.
    Type: Application
    Filed: September 11, 2009
    Publication date: March 17, 2011
    Applicant: Sun Microsystems, Inc.
    Inventors: Jorge Eduardo Martinez-Vargas, Lien-Fen(Livia) Hu, Samuel Ming Sien Lee, James David Britton, Martin John Henson
  • Patent number: 7902465
    Abstract: Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like, are described herein. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: March 8, 2011
    Assignee: Oracle America, Inc.
    Inventors: James David Britton, Jorge Eduardo Martinez-Vargas
  • Publication number: 20110050252
    Abstract: An apparatus and method for determining characterizing attributes of an actuator is provided. An actuator may be moved to a maximum capacitance position. At the maximum capacitance position, an initial measurement of the actuator capacitance is made. The actuator is moved a predetermined increment toward a first extreme position, and the actuator capacitance is again measured. If the capacitance changed by a threshold amount, the signal preceding the signal that caused the actuator to move is recorded as an approximate response curve end point, or the first extreme position. The actuator is again moved a predetermined increment toward a second extreme position. After each move, the capacitance is measured. If it is determined the capacitance did change by a threshold amount from the previously measured capacitance, the signal related to the previously measured capacitance is recorded as an approximate response curve end point, or the second extreme position.
    Type: Application
    Filed: August 20, 2010
    Publication date: March 3, 2011
    Applicant: ANALOG DEVICES, INC.
    Inventors: Eduardo Martinez, Christian Jimenez, Jose Ibanez-Climent, Colm Donovan
  • Publication number: 20100308902
    Abstract: A reference voltage generator circuit may include at least one MOS transistor and at least one bipolar transistor coupled together to provide an electrical path from an input reference potential to an output of the generator circuit. The electrical path may extend through a gate-to-source path of the MOS transistor and further through a base-to-emitter path of the bipolar transistor. The MOS transistor may be biased by a bias current that is proportional to T2·?(T), where T represents absolute temperature and ?(T) represents mobility of a MOS transistor in the bias current generator. Optionally, the reference voltage generator may include N MOS and M multiple bipolar transistors (N?1, M?1), and the output reference voltage may be N*VGS+M*VBE as compared to the input reference potential.
    Type: Application
    Filed: April 19, 2010
    Publication date: December 9, 2010
    Applicant: ANALOG DEVICES, INC.
    Inventors: Santiago IRIARTE, Alberto MARINAS, Colm DONOVAN, Eduardo MARTINEZ
  • Publication number: 20100208242
    Abstract: A focus error signal resulting from the photothermically-induced expansion is measured in a sample of material under analysis. A laser is disposed as a periodically modulated heating source which is directed to the sample and a device for focus error measuring which is directed to de surface being heated. A device measuring focus error generates a signal representative of the displacement of the surface of material in perpendicular direction due to the expansion produced by the periodic heating, which is filtered, either analogically or digitally, to discriminate the displacement component at the frequency in which it was modulated or at any other related frequency, such any harmonic or a sum with any other modulation. The focus error signal, appropriately calibrated, gives a precise and sensitive measure of the magnitude the expansion.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 19, 2010
    Applicant: CONSEJO NACIONAL DE INVESTIGACIONES CIENTIFICAS Y TECNICAS (CONICET)
    Inventors: Oscar Eduardo MARTÍNEZ, Esteban Alejo DOMENE, Nélida MINGOLO, Francisco BALZAROTTI, Andrea Veronica BRAGAS
  • Publication number: 20100155106
    Abstract: Implementations of the present invention may involve methods for providing an optical differentiation on a printed circuit board to assist in identifying a missing or improperly mounted component. The optical differentiation may be such that, when a component of the board is missing or improperly attached to the board, a distinct optical difference is created on the board in the visible or non-visible spectrum. Several implementations may create a visible color difference, a non-visible mark, a recognizable shape, texture change, cross hatching or other form of physical modification beneath the component or on the printed circuit board. Other implementations may include the optical differentiation within a silk-screen of the board or on an internal layer of the board.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Applicant: Sun Microsystems, Inc.
    Inventors: James David Britton, Thomas J. Pelc, Jorge Eduardo Martinez-Vargas, JR.
  • Publication number: 20100085717
    Abstract: In at least one embodiment, a circuit board assembly that includes a printed circuit board is provided. The printed circuit board includes a top surface and a bottom surface for supporting at least one through-hole electrical component. The printed circuit board defines at least one component hole extending from the top surface to the bottom surface for receiving the at least one through-hole electrical component. The at least one component hole includes a first section having a first diameter and a second section having a second diameter. The first diameter is different from the second diameter. Each of the first and the second sections are configured to receive solder paste for forming a solder joint with the at least one through-hole electrical component.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 8, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, JR., Michael Clifford Freda
  • Publication number: 20100084178
    Abstract: A via is provided on a printed circuit board with at least one additional depression encompassing the via, such that the via passes through a portion of the depression. Solder can pool in the depression, allowing for a stronger mechanical bond and eliminating many issues with respect to a lack of coplanarity between a lead and the printed circuit board. The depression can be provided with plugged and unplugged vias, and improves the mountings associated with both.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 8, 2010
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Michael Francis Sweeney, Jorge Eduardo Martinez-Vargas, JR., Michael Clifford Freda
  • Publication number: 20090186834
    Abstract: Various azetidinone, pyrrolidine, imidazolidine, and oxazolidine derivatives are described, as are pharmaceutical compositions containing these compounds and methods of treatment of diseases using these compounds. Other embodiments are also described.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 23, 2009
    Applicant: MICROBIA, INC.
    Inventors: John Talley, Eduardo Martinez, Daniel Zimmer, Regina Lundrigan
  • Publication number: 20090030846
    Abstract: A system for facilitating payment to a party not having an account with a financial institution, including: a payments facilitator; and at least one account established by the payments facilitator with at least one financial institution. When a payer sends a communication message to the payments facilitator to make a payment to the party, the payments facilitator allocates one of the at least one accounts to the party and links the allocated account with a unique identifier assigned to the party. Payment is thereafter made by the payer to the allocated account. Preferably, the payment is an electronic payment. In a further arrangement of the invention there is a system for facilitating transfer of load between dealers and/or customers of a telecommunications carrier that can include the system already described.
    Type: Application
    Filed: April 19, 2004
    Publication date: January 29, 2009
    Applicant: PAYSETTER PTE LTD
    Inventors: Eduardo Martinez-Miranda, Eugene L. Enriquez, Dennis B. Mendiola, MA. Rosario Peralta
  • Patent number: 7320972
    Abstract: 4-Biarylyl-1-phenylazetidin-2-ones useful for the treatment of hypercholesterolemia are disclosed. The compounds are of the general formula in which represents an aryl or heteroaryl residue; Ar represents an aryl residue; U is a two to six atom chain; and the R's represent substituents.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: January 22, 2008
    Assignee: Microbia, Inc.
    Inventors: Eduardo Martinez, John J. Talley, Stephen Antonelli, Timothy C. Barden, Regina Lundrigan-Soucy, Wayne C. Schairer, Jing-Jing Yang, Daniel P. Zimmer, Brian Cali, Mark G. Currie, Peter S. Yorgey
  • Publication number: 20070161577
    Abstract: Derivatives of 1,4-diphenylazetidin-2-ones useful for the treatment of hypercholesterolemia are disclosed.
    Type: Application
    Filed: August 27, 2004
    Publication date: July 12, 2007
    Inventors: Eduardo Martinez, John Talley