Patents by Inventor Edvard Kalvesten

Edvard Kalvesten has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120097733
    Abstract: A sealing and bonding material structure for joining semiconductor wafers having monolithically integrated components. The sealing and bonding material are provided in strips forming closed loops. There are provided at least two concentric sealing strips on one wafer. The strips are laid out so as to surround the component(s) on the wafers to be sealed off when wafers are bonded together. The material in the strips is a material bonding the semiconductor wafers together and sealing off the monolithically integrated components when subjected to force and optionally heating. A monolithically integrated electrical and/or mechanical and/or fluidic and/or optical device including a first substrate and a second substrate, bonded together with the sealing and bonding structure, and a method of providing a sealing and bonding material structure on at least one of two wafers and applying a force and optionally heat to the wafers to join them are described.
    Type: Application
    Filed: January 5, 2012
    Publication date: April 26, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn EBEFORS, Edvard KÄLVESTEN, Niklas SVEDIN, Anders ERIKSSON
  • Publication number: 20120018852
    Abstract: A vent hole precursor structure (26) in an intermediate product for a semi-conductor device has delicate structures (27, 28), and said intermediate product has a cavity (21) with a pressure therein differing from the pressure of the surroundings. The intermediate product comprises a first wafer (20) in which there is formed a depression (21). The first wafer is bonded to a second wafer (22) comprising a device layer (23) from which the structures (27, 28) are to be made by etching. A hole or groove (26) having a predefined depth extends downwards into the device layer, such that the cavity (21) during etching is opened up before the etching procedure breaks through the device layer (23) to form the structures (27, 28).
    Type: Application
    Filed: July 28, 2011
    Publication date: January 26, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin
  • Publication number: 20120018898
    Abstract: The invention relates to a layered micro-electronic and/or micro-mechanic structure, comprising at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
    Type: Application
    Filed: December 23, 2009
    Publication date: January 26, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin
  • Publication number: 20120019886
    Abstract: A layered micro-electronic and/or micro-mechanic structure comprises at least three alternating electrically conductive layers with insulating layers between the conductive layers. There is also provided a via in a first outer layer, said via comprising an insulated conductive connection made of wafer native material through the layer, an electrically conductive plug extending through the other layers and into said via in the first outer layer in order to provide conductivity through the layers, and an insulating enclosure surrounding said conductive plug in at least one selected layer of said other layers for insulating said plug from the material in said selected layer. It also relates to micro-electronic and/or micro-mechanic device comprising a movable member provided above a cavity such that it is movable in at least one direction. The device has a layered structure according to the invention. Methods of making such a layered MEMS structure is also provided.
    Type: Application
    Filed: June 22, 2011
    Publication date: January 26, 2012
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjörn Ebefors, Edvard Kälvesten, Peter Agren, Niklas Svedin, Thomas Ericson
  • Publication number: 20100053922
    Abstract: A method of micro-packaging a component wherein at least a first and a second semi-conductor substrate are provided, one of which has electrical through connections (vias). A depression in either one of the substrates or in both is etched. A component is provided above vias and connected thereto. The substrates are joined to form a sealed package. A micro-packaged electronic or micromechanic device, including a thin-walled casing of a semi-conductor material having electrical through connections through the bottom of the casing is also disclosed. An electronic or micromechanic component is attached to the electrical through connections, and the package is hermetically sealed for maintaining a desired atmosphere, suitably vacuum inside the box.
    Type: Application
    Filed: January 25, 2008
    Publication date: March 4, 2010
    Applicant: SILEX MICROSYSTEMS AB
    Inventors: Thorbjorn Ebefors, Edvard Kalvesten, Tomas Bauer
  • Publication number: 20100006536
    Abstract: The invention relates in a general aspect to a method of making vertically protruding elements on a substrate, said elements having a tip comprising at least one inclined surface and an elongated body portion extending between said substrate and said tip. The method comprises an anisotropic, crystal plane dependent etch forming said inclined surface(s); and an anisotropic, non crystal plane dependent etch forming said elongated body portion; combined with suitable patterning processes defining said protruding elements to have a predetermined base geometry.
    Type: Application
    Filed: December 14, 2006
    Publication date: January 14, 2010
    Inventors: Edvard Kälvesten, Thorbjörn Ebefors, Thierry Corman
  • Publication number: 20090195948
    Abstract: The invention relates to a method of making a starting substrate wafer for semiconductor engineering having electrical wafer through connections (140; 192). It comprises providing a wafer (110; 150) having a front side and a back side and having a base of low resistivity silicon and a layer of high resistivity material on the front side. On the wafer there are islands of low resistivity material in the layer of high resistivity material. The islands are in contact with the silicon base material. Trenches are etched from the back side of the wafer but not all the way through the wafer to provide insulating enclosures defining the wafer through connections (140; 192). The trenches are filled with insulating material. Then the front side of the wafer is grinded to expose the insulating material to create the wafer through connections.
    Type: Application
    Filed: January 31, 2007
    Publication date: August 6, 2009
    Inventors: Edvard Kalvesten, Tomas Bauer, Thorbjorn Ebefors
  • Patent number: 7560802
    Abstract: A method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate includes creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of the substrate, defined by the trench. Also described is a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, including a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through the substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and includes the same material as the substrate, i.e. it is made from the wafer material.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: July 14, 2009
    Assignee: Silex Microsystems AG
    Inventors: Edvard Kälvesten, Thorbjörn Ebefors, Niklas Svedin, Pelle Rangsten, Tommy Schönberg
  • Publication number: 20080308884
    Abstract: A method of making a fluid communication channel between a micro mechanical structure provided on a front side of a device and the back side of said device is described. It includes making the required structural components by lithographic and etching processes on said front side. Holes are then drilled from the back side of said device in precise alignment with the structures on said front side, to provide inlets and/or outlets to and/or from the micromechanical structure.
    Type: Application
    Filed: October 5, 2006
    Publication date: December 18, 2008
    Applicant: SILEX MICROSYSTEMS AB
    Inventor: Edvard Kalvesten
  • Patent number: 7207227
    Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: April 24, 2007
    Assignee: Silex Microsystems AB
    Inventors: Pelle Rangsten, Edvard Kalvesten, Marianne Mechbach
  • Patent number: 7172911
    Abstract: A method of making a deflectable, free hanging micro structure having at least one hinge member, the method includes the steps of providing a first sacrificial wafer having a single crystalline material constituting material forming the micro structure. A second semiconductor wafer including necessary components for forming the structure in cooperation with the first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of the wafers at selected locations, the finite areas defining points of connection for joining the wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from the sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: February 6, 2007
    Assignee: Silex Microsystems AB
    Inventors: Edvard Kälvesten, Thorbjörn Ebefors, Niklas Svedin, H{dot over (a)}kan Westin
  • Publication number: 20070020926
    Abstract: A method of making an electrical connection between a first (top) and a second (bottom) surface of a conducting or semi-conducting substrate includes creating a trench in the first surface, and establishing an insulating enclosure entirely separating a portion of the substrate, defined by the trench. Also described is a product usable as a starting substrate for the manufacture of micro-electronic and/or micro-mechanic devices, including a flat substrate of a semi-conducting or conducting material, and having a first and a second surface and at least one electrically conducting member extending through the substrate. The electrically conducting member is insulated from surrounding material of the flat substrate by a finite layer of an insulating material, and includes the same material as the substrate, i.e. it is made from the wafer material.
    Type: Application
    Filed: March 22, 2004
    Publication date: January 25, 2007
    Inventors: Edvard Kalvesten, Thorbjorn Ebefors, Nikias Svedin, Pelle Rangsten, Tommy Schonberg
  • Publication number: 20060173261
    Abstract: A sensor for measuring biopotential signals from the skin of a patient. The sensor comprises a carrier having a top surface positioned contiguous with the skin of the patient when the sensor is applied to the patient's skin and a bottom surface facing away from the patient when the sensor is applied to the patient's skin. The carrier has further plurality of spikes extending from the top surface for being inserted into the skin of the patient when the sensor is applied to the patient's skin. The sensor further comprises means for obtaining the biopotential signal and for making the biopotential signal available externally of the sensor. The carrier is manufactured of non-conductive material and the non-conductive material is made conductive to form electrical connection between the top and bottom surfaces of the carrier.
    Type: Application
    Filed: January 31, 2005
    Publication date: August 3, 2006
    Inventors: Magnus Kall, Edvard Kalvesten
  • Patent number: 7067345
    Abstract: A method of combining components to form an integrated device, wherein the components are provided on a first sacrificial wafer, and a second non-sacrificial wafer, respectively. The sacrificial wafer carries a first plurality of components and the non-sacrificial wafer carries a second plurality of components. The wafers are bonded together with an intermediate bonding material. Optionally the sacrificial wafer is thinned to a desired level. The components of the sacrificial wafer are electrically interconnected to the component(s) on the non-sacrificial wafer. Finally, optionally the intermediate bonding material is stripped away.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: June 27, 2006
    Inventors: Edvard Kälvesten, Göran Stemme, Frank Niklaus
  • Patent number: 7017420
    Abstract: An entirely surface micromachined free hanging strain-gauge pressure sensor is disclosed. The sensing element consists of a 80 ?m long H-shaped double ended supported force transducing beam (16). The beam is located beneath and at one end attached to a square polysilicon diaphragm (14) and at the other end to the cavity edge. The sensor according to the invention enables a combination of high pressure sensitivity and miniature chip size as well as good environmental isolation. The pressure sensitivity for the sensor with a H-shaped force transducing beam, 0.4 ?m thick was found to be 5 ?V/V/mmHg.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: March 28, 2006
    Assignees: Silex Microsystems AB
    Inventors: Edvard Kälvesten, Patrik Melv{dot over (a)}s, Göran Stemme
  • Publication number: 20060032039
    Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm.
    Type: Application
    Filed: October 17, 2005
    Publication date: February 16, 2006
    Applicant: Silex Microsystems AB
    Inventors: Pelle Rangsten, Edvard Kalvesten, Marianne Mechbach
  • Patent number: 6973835
    Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD. Sensor paths for sensing the deflection of the diaphragm are applied on the outer or inner surface of the diaphragm.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: December 13, 2005
    Assignee: Silex Microsystems AB
    Inventors: Pelle Rangsten, Edvard Kalvesten, Marianne Mechbach
  • Publication number: 20050124159
    Abstract: A method of making a deflectable, free hanging micro structure having at least one hinge member, the method includes the steps of providing a first sacrificial wafer having a single crystalline material constituting material forming the micro structure. A second semiconductor wafer including necessary components for forming the structure in cooperation with the first wafer is provided. Finite areas of a structured bonding material is provided, on one or both of the wafers at selected locations, the finite areas defining points of connection for joining the wafers. The wafers are bonded using heat and optionally pressure. Sacrificial material is etched away from the sacrificial wafer, patterning the top wafer by lithography is performed to define the desired deflectable microstructures having hinges, and subsequently silicon etch to make the structures.
    Type: Application
    Filed: February 14, 2003
    Publication date: June 9, 2005
    Inventors: Edvard Kalvesten, Thorbjorn Ebefors, Niklas Svedin, Hakan Westin
  • Publication number: 20040237285
    Abstract: In manufacturing a pressure sensor a recess that will form part of the sensor cavity is formed in a lower silicon substrate. An SOI-wafer having a monocrystalline silicon layer on top of a substrate is bonded to the lower silicon substrate closing the recess and forming the cavity. The supporting substrate of the SOI-wafer is then etched away, the portion of the monocrystalline layer located above the recess forming the sensor diaphragm. The oxide layer of the SOI-wafer here acts as an “ideal” etch stop in the case where the substrate wafer is removed by dry (plasma) or wet etching using e.g. KOH. This is due to high etch selectivity between silicon and oxide for some etch processes and it results in a diaphragm having a very accurately defined and uniform thickness. The cavity is evacuated by forming a opening to the cavity and then sealing the cavity by closing the opening using LPCVD.
    Type: Application
    Filed: April 15, 2004
    Publication date: December 2, 2004
    Inventors: Pelle Rangsten, Edvard Kalvesten, Marianne Mechbach
  • Publication number: 20030102079
    Abstract: A method of combining components to form an integrated device, wherein the components are provided on a first sacrificial wafer, and a second non-sacrificial wafer, respectively. The sacrificial wafer carries a first plurality of components and the non-sacrificial wafer carries a second plurality of components. The wafers are bonded together with an intermediate bonding material. Optionally the sacrificial wafer is thinned to a desired level. The components of the sacrificial wafer are electrically interconnected to the component(s) on the non-sacrificial wafer. Finally, optionally the intermediate bonding material is stripped away.
    Type: Application
    Filed: January 6, 2003
    Publication date: June 5, 2003
    Inventors: Edvard Kalvesten, Goran Stemme, Frank Niklaus