Abstract: A configuration control of a duplex real time processor system without the need for third party configuration control circuitry is provided. A remote control system is connected to duplex real time processors via a pair of serial data links. These data links are configured in an active/standby arrangement. The serial links are connected to the duplex real time processors in such a way that each processor of the pair determines independently whether to assume an active or a standby role. Each real time processor bases this decision upon the identity of the serial link from which it is receiving data transmitted by a remote control system.

Abstract: This circuit provides for the connection of simplex I/O terminals to duplex processor copies. Each processor copy's configuration provides for a terminal control circuit. These copies of the terminal control circuit are cross connected in order to provide access from each processor to each I/O terminal. Normal operation consists of a particular I/O terminal being operated by one processor copy. If the processor copy corresponding to a particular terminal is faulty or removed from service, that terminal is then automatically cross-connected to the active processor copy and receives output from that processor copy. If one processor copy is out of service, both I/O terminals receive output from the active processor copy. If the I/O terminal which is normally connected to the active processor copy becomes out of service and the other processor copy is out of service, the I/O terminal which is normally connected to the other processor copy will be reconfigured to be connected to the active processor.

Abstract: This invention discloses a circuit for examining the value transmitted via a digital bus. A determination is made as to whether the value matches a predefined programmable value. An output indication is given for a match. In addition, this circuit may examine the transmitted value to determine whether it is within the bounds of a predefined range of values. This circuit utilizes a minimum of space and hardware components, due to its fabrication using RAM devices and a program logic array.

Abstract: A multiple port serial link controller printed wiring card is shown. This printed wiring card provides at least two independent ports. These ports may be of different types such as RS-232 interface, RS-449 interface or other serial protocols such as HDLC, SDLC or BISYNC. These printed wiring cards may be combined in a duplex fasion to form two duplex (highly reliable) port transmission circuits. The duplex configuration requires a minimum amount of backplane wiring. This backplane wiring is permanent and requires no manual intervention for switching between transmission and mode types. Switching between transmission mode type and reconfiguring for the occurrence of faults may be accomplished by an automatic processor manipulation of a number of control points.

Abstract: A multiple port serial link controller printed wiring card is shown. This printed wiring card provides at least two independent ports. These ports may be of different types such as RS-232 interface, RS-499 interface or other serial protocols such as HDLC, SDLC or BISYNC. These printed wiring cards may be combined in a duplex fashion to form two duplex (highly reliable) port transmission circuits. The duplex configuration requires a minimum amount of backplane wiring. This backplane wiring is permanent and requires no manual intervention for switching between transmission and mode types. Switching between transmission mode type and reconfiguring for the occurrence of faults may be accomplished by an automatic processor manipulation of a number of control points.

Abstract: This invention describes a method for mapping one or more of a number of input events to one or more of a number of output functions. This method involves the use of a memory device to perform the mapping between the input events and the output functions. This invention performs the mapping function with a minimum of hardware devices.