Patents by Inventor Ei Yano

Ei Yano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090061633
    Abstract: According to an aspect of an embodiment, a method of manufacturing a semiconductor device has forming an insulating layer comprising silica-based insulating material, processing the insulating layer, hydrophobizing the insulating layer by applying a silane compound to act on the insulating layer; and irradiating the insulating layer with light or an electron beam.
    Type: Application
    Filed: August 27, 2008
    Publication date: March 5, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Yoshihiro NAKATA, Tadahiro IMADA, Shirou OZAKI, Yasushi KOBAYASHI, Kohta YOSHIKAWA, Ei YANO
  • Publication number: 20090038833
    Abstract: A layer of a porous insulating film precursor is formed on or over a substrate, a layer of a specific silicon compound is then formed, this silicon compound layer is pre-cured as necessary, and the porous insulating film precursor is exposed to UV through the silicon compound layer or pre-cured layer.
    Type: Application
    Filed: August 4, 2008
    Publication date: February 12, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Yoshihiro NAKATA, Ei YANO
  • Patent number: 7488569
    Abstract: A negative resist composition containing an alkaline-soluble resin as a base material, in which an oxetane structure represented by the following formula (1): is contained in a structure of the alkaline-soluble resin or in a structure of a compound used in combination with the alkaline-soluble resin, is disclosed.
    Type: Grant
    Filed: July 26, 2006
    Date of Patent: February 10, 2009
    Assignee: Fujitsu Limited
    Inventors: Miwa Kozawa, Koji Nozaki, Keiji Watanabe, Ei Yano
  • Patent number: 7476970
    Abstract: A method for fabricating a semiconductor device utilizing the step of forming a first insulating film of a porous material over a substrate; the step of forming on the first insulating film a second insulating film containing a silicon compound containing Si—CH3 bonds by 30-90%, and the step of irradiating UV radiation with the second insulating film formed on the first insulating film to cure the first insulating film. Thus, UV radiation having the wavelength which eliminates CH3 groups is sufficiently absorbed by the second insulating film, whereby the first insulating film is highly strengthened with priority by the UV cure, and the first insulating film can have the film density increased without having the dielectric constant increased.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: January 13, 2009
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Yoshihiro Nakata, Ei Yano
  • Patent number: 7465527
    Abstract: The resist material contains a photo-acid generator having an absorption peak to exposure light having a wavelength of less than 300 nm, and a second photo-acid generator having an absorption peak to exposure light having a wavelength of 300 nm or more. The method for forming a resist pattern comprises a step for selectively exposing which exposes a coating film of the resist material to an exposure light having a wavelength of less than 300 nm, and a step for selectively exposing by using an exposure light having a wavelength of 300 nm or more. The semiconductor device comprises a pattern formed by the resist pattern. The method for forming a semiconductor device comprises a step for forming a resist pattern on an underlying layer by the aforementioned manufacturing method, and a step for patterning the underlying layer by etching using the resist pattern as a mask.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: December 16, 2008
    Assignee: Fujitsu Limited
    Inventors: Junichi Kon, Ei Yano
  • Publication number: 20080274431
    Abstract: To provide a method for easily forming microscopic patterns exceeding the limit of exposure in the patterning technique utilizing the photolithography method in the vacuum deep ultraviolet ray region, a resist pattern swelling material is comprised by mixing a water-soluble or alkali-soluble composition comprising a resin and a cross linking agent and any one of a non-ionic interfacial active agent and an organic solvent selected from a group of the alcohol based, chain or cyclic ester based, ketone based, chain or cyclic ether based organic solvents.
    Type: Application
    Filed: June 25, 2008
    Publication date: November 6, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Koji Nozaki, Miwa Kozawa, Takahisa Namiki, Junichi Kon, Ei Yano
  • Patent number: 7403024
    Abstract: A contactor has contact electrodes elastically deformable in a direction of thickness of the contactor so that the contactor can make a contact with a semiconductor device with an appropriate contact pressure. The contactor is positioned between the semiconductor device and a test board so as to electrically connect the semiconductor device to the test board. Each of a plurality of contact electrodes has a first contact electrode part, a second contact electrode part and a connecting part electrically connecting the first contact electrode part to the second contact electrode part. The first contact electrode part contacts an electrode of the semiconductor device. The second contact electrode part contacts a terminal of the test board. A combining member has an insulating characteristic and holds the connecting part of each of the contact electrodes in a predetermined arrangement.
    Type: Grant
    Filed: July 28, 2004
    Date of Patent: July 22, 2008
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Kazuhiro Tashiro, Naoyuki Watanabe, Daisuke Koizumi, Takafumi Hashitani, Ei Yano
  • Patent number: 7358299
    Abstract: A composition comprising a siloxane resin, a silicon compound substantially consisting of silicon, carbon and hydrogen, wherein the number ratio of carbon to silicon atoms forming an —X— bond (wherein X is (C)m (where m is an integer in the range of from 1 to 3), or a substituted or unsubstituted aromatic group with 9 or less carbon atoms) in the main chain of one molecule is in the range of from 2:1 to 12:1, and a solvent, is subjected to a heat treatment to form a low dielectric constant film. Accordingly, a low dielectric constant film having excellent resistance against chemicals and excellent moisture resistance is provided. A semiconductor integrated circuit having a fast response can be produced by using the film.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: April 15, 2008
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Ei Yano
  • Publication number: 20080050933
    Abstract: In a method for manufacturing a semiconductor device, including forming an insulator film including a material having Si—CH3 bond and Si—OH bond, and irradiating the insulator film with ultraviolet rays, the rate of decrease of C concentration by X-ray photoelectron spectroscopy is not more than 30%, and the rate of decrease of one or more bonds selected from the group consisting of C—H bond, O—H bond and Si—O bond of Si—OH is not less than 10%, as a result of ultraviolet ray irradiation. A low-dielectric-constant insulator film that has a high film strength and can prevent increase of dielectric constant due to moisture absorption, a semiconductor device that can prevent device response speed delay and reliability decrease due to parasite capacity increase, and a manufacturing method therefor are provided.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 28, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Yoshihiro NAKATA, Ei YANO
  • Publication number: 20070226987
    Abstract: The method for fabricating the magnetic head comprises the step of forming over a lower electrode a magnetoresistive effect film 16 with a polishing resistant film 20 formed over the upper surface, the step of forming a magnetic domain control film 24 over the entire surface of the lower electrode 12 including a region where the magnetoresistive effect film 16 has been formed, the step of selectively removing the magnetic domain control film 24 over the magnetoresistive effect film 16 by polishing with the polishing resistant film 20 as the stopper, the step of removing the polishing resistant film 20, and the step of forming an upper electrode 34 over the magnetoresistive effect film 16, from which the polishing resistant film 20 has been removed.
    Type: Application
    Filed: June 15, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Endo, Yasuhiro Wakabayashi, Shin Eguchi, Tamotsu Yamamoto, Ei Yano
  • Publication number: 20070232058
    Abstract: The method for fabricating a semiconductor device comprises the step of forming a first insulating film 38 of a porous material over a substrate 10; the step of forming on the first insulating film 38 a second insulating film 40 containing a silicon compound containing Si—CH3 bonds by 30-90%, and the step of irradiating UV radiation with the second insulating film 40 formed on the first insulating film 38 to cure the first insulating film 38. Thus, UV radiation having the wavelength which eliminates CH3 groups is sufficiently absorbed by the second insulating film, whereby the first insulating film is highly strengthened with priority by the UV cure, and the first insulating film can have the film density increased without having the dielectric constant increased.
    Type: Application
    Filed: June 27, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Yoshihiro Nakata, Ei Yano
  • Publication number: 20070230061
    Abstract: The method for fabricating the magnetic head comprises the step of forming over a lower electrode a magnetoresistive effect film 16 with a polishing resistant film 20 formed over the upper surface, the step of forming a magnetic domain control film 24 over the entire surface of the lower electrode 12 including a region where the magnetoresistive effect film 16 has been formed, the step of selectively removing the magnetic domain control film 24 over the magnetoresistive effect film 16 by polishing with the polishing resistant film 20 as the stopper, the step of removing the polishing resistant film 20, and the step of forming an upper electrode 34 over the magnetoresistive effect film 16, from which the polishing resistant film 20 has been removed.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroshi Endo, Yasuhiro Wakabayashi, Shin Eguchi, Tamotsu Yamamoto, Ei Yano
  • Publication number: 20070232075
    Abstract: Techniques for obtaining a wiring layer with a high TDDB resistance and little leakage current, and accordingly, for manufacturing a highly reliable semiconductor device with a small electric power consumption are provided, in which an interfacial roughness reducing film is formed which is in contact with an insulator film and also in contact with a wiring line on the other side surface thereof, and has an interfacial roughness between the wiring line and the interfacial roughness reducing film smaller than that between the insulator film and the interfacial roughness reducing film.
    Type: Application
    Filed: March 23, 2007
    Publication date: October 4, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Tadahiro Imada, Yoshihiro Nakata, Ei Yano
  • Patent number: 7262142
    Abstract: The semiconductor device fabrication method comprises the step of forming a first porous insulation film 38 over a semiconductor substrate 10; the step of forming a second insulation film 40 whose density is higher than that of the first porous insulation film 38; and the step of applying electron beams, UV rays or plasmas with the second insulation film 40 present to the first porous insulation film 38 to cure the first porous insulation film 38. The electron rays, etc. are applied to the first porous insulation film 38 through the denser second insulation film 40, whereby the first porous insulation film 38 can be cured without being damaged. The first porous insulation film 38 can be kept from being damaged, whereby the moisture absorbency and density increase can be prevented, and resultantly the dielectric constant increase can be prevented. Thus, the present invention can provide a semiconductor device including an insulation film of low dielectric constant and high mechanical strength.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: August 28, 2007
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Shirou Ozaki, Ei Yano
  • Patent number: 7235866
    Abstract: A low dielectric film forming material contains siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided which is suitable for inter-level insulating film material. A semiconductor device is also provided which has a low dielectric constant film and high reliability.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: June 26, 2007
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Shun-ichi Fukuyama, Katsumi Suzuki, Ei Yano, Tamotsu Owada, Iwao Sugiura
  • Patent number: 7232769
    Abstract: The present invention relates to an amorphous silica-based coating film with a low specific dielectric constant of 2.5 or below and the Young's modulus of 6.0 GPa or more and having excellent hydrophobic property, and to a method of forming the same. A liquid composition containing a silicon compound obtained by hydrolyzing tetraalkyl ortho silicate (TAOS) and specific alkoxysilane (AS) in the presence of tetraalkyl ammonium hydroxide (TAAOH) is prepared. The liquid composition is then applied on a substrate, heated and cured to obtain a coating film. The coating film obtained as described has a smooth surface and also has specific micropores therein.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: June 19, 2007
    Assignees: Catalysts & Chemicals Industries Co., Ltd., Fujitsu Limited
    Inventors: Akira Nakashima, Miki Egami, Michio Komatsu, Yoshihiro Nakata, Ei Yano, Katsumi Suzuki
  • Publication number: 20070111539
    Abstract: The present invention aims at providing: a material for forming an adhesion reinforcing layer which can reinforce the adhesion between a low dielectric constant film, especially a low dielectric constant film containing an inorganic material, and other members; an adhesion reinforcing layer formed by the said material and exhibits superior adhesion; a fast and highly reliable semiconductor device having the adhesion reinforcing layer; and a manufacturing method thereof. The material for forming an adhesion reinforcing layer contains at least any one of organoalkoxysilane having a basic functional group, a basic additive and organoalkoxysilane. The adhesion reinforcing layer is formed by the said material. The manufacturing method of a semiconductor device includes a process for forming a low dielectric constant film and, at least before or after the process for forming a low dielectric constant film, a process for forming an adhesion reinforcing layer with the said material.
    Type: Application
    Filed: April 3, 2006
    Publication date: May 17, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Junichi Kon, Ei Yano, Yoshihiro Nakata, Tadahiro Imada
  • Publication number: 20070106021
    Abstract: A resist pattern thickening material has resin, a crosslinking agent and a compound having a cyclic structure, or resin having a cyclic structure at a part. A resist pattern has a surface layer on a resist pattern to be thickened with etching rate (nm/s) ratio of the resist pattern to be thickened the surface layer of 1.1 or more, under the same condition, or a surface layer to a resist pattern to be thickened. A process for forming a resist pattern includes applying the thickening material after forming a resist pattern to be thickened on its surface. A semiconductor device has a pattern formed by the resist pattern. A process for manufacturing the semiconductor device has applying, after forming a resist pattern to be thickened, the thickening material to the surface of the resist pattern to be thickened, and patterning the underlying layer by etching, the pattern as a mask.
    Type: Application
    Filed: December 22, 2006
    Publication date: May 10, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Miwa Kozawa, Koji Nozaki, Takahisa Namiki, Junichi Kon, Ei Yano
  • Patent number: 7202679
    Abstract: A contactor is provided which contactor comprises an insulating substrate, a concave portion formed in the insulating substrate and extending in a perpendicular direction from a surface thereof, and elastic conductive particles disposed in the concave portion. A part of one of the conductive particles protrudes from the surface of the insulating substrate.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: April 10, 2007
    Assignee: Fujitsu Limited
    Inventors: Shigeyuki Maruyama, Susumu Kida, Naoyuki Watanabe, Takafumi Hashitani, Ei Yano, Ichiro Midorikawa
  • Patent number: 7189783
    Abstract: A resist pattern thickening material has resin, a crosslinking agent and a compound having a cyclic structure, or resin having a cyclic structure at a part. A resist pattern has a surface layer on a resist pattern to be thickened with etching rate (nm/s) ratio of the resist pattern to be thickened the surface layer of 1.1 or more, under the same condition, or a surface layer to a resist pattern to be thickened. A process for forming a resist pattern includes applying the thickening material after forming a resist pattern to be thickened on its surface. A semiconductor device has a pattern formed by the resist pattern. A process for manufacturing the semiconductor device has applying, after forming a resist pattern to be thickened, the thickening material to the surface of the resist pattern to be thickened, and patterning the underlying layer by etching, the pattern as a mask.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: March 13, 2007
    Assignee: Fujitsu Limited
    Inventors: Miwa Kozawa, Koji Nozaki, Takahisa Namiki, Junichi Kon, Ei Yano