Patents by Inventor Eiichi Sano

Eiichi Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240072406
    Abstract: Provided is a distribution circuit which has good pass characteristic and isolation characteristic over a wide band. A distribution circuit, in which Wilkinson-type distribution circuits configured with a coil, a capacitor, and a resistor are cascaded in two stages between an input terminal and at least three terminals, and a capacitor is connected in parallel with the resistor inserted between the output terminals in the latter-stage Wilkinson-type distribution circuits.
    Type: Application
    Filed: December 9, 2021
    Publication date: February 29, 2024
    Inventors: TOMOMICHI MURAKAMI, EIICHI SANO, TAKAHIRO ANDO, NORIHIRO MURAYAMA
  • Patent number: 8917804
    Abstract: A clock data recovery circuit includes a ring oscillator, an oscillation control circuit unit to start or stop the ring oscillator according to existence or absence of a PWM signal, a counter circuit unit to count pulse signals to hold N bits of count value, a register circuit unit which is configured to transmit upper M bits of count value, as a reference count value, in response to a transmission signal, a comparison circuit unit to output a timing clock when the count value exceeds the reference count value, and a transmission control circuit unit to be synchronized with a rising timing of the PWM signal to generate the transmission signal and a reset signal for resetting the counter circuit unit.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: December 23, 2014
    Assignee: National University Corporation Hokkaido University
    Inventors: Eiichi Sano, Yoshihito Amemiya
  • Publication number: 20140003566
    Abstract: A clock data recovery circuit includes a ring oscillator, an oscillation control circuit unit to start or stop the ring oscillator according to existence or absence of a PWM signal, a counter circuit unit to count pulse signals to hold N bits of count value, a register circuit unit which is configured to transmit upper M bits of count value, as a reference count value, in response to a transmission signal, a comparison circuit unit to output a timing clock when the count value exceeds the reference count value, and a transmission control circuit unit to be synchronized with a rising timing of the PWM signal to generate the transmission signal and a reset signal for resetting the counter circuit unit.
    Type: Application
    Filed: February 17, 2011
    Publication date: January 2, 2014
    Applicant: National University Corporation Hokkaido University
    Inventors: Eiichi Sano, Yoshihito Amemiya
  • Publication number: 20130027167
    Abstract: Provided is a circuit board including an air core coil including a winding portion having a conductive wire wound in a helical shape, a first lead portion extending from an end of the winding portion, and a second lead portion extending from another end of the winding portion, wherein the first lead portion and the second lead portion extend in different directions from each other on a substantially same plane, and a coil mounting portion including an opening to accommodate the winding portion, a first conductive part provided on a periphery of the opening and contacting the first lead portion, and a second conductive part provided on the periphery of the opening and contacting the second lead portion.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 31, 2013
    Applicant: SONY CORPORATION
    Inventor: Eiichi Sano
  • Patent number: 8227794
    Abstract: Provided is a complementary logical gate device represented by a silicon CMOS logical circuit among semiconductor integrated logical circuits which can effectively solve the problem of the speed performance limit of an ultra-large scale integration and an ultra-low power consumption type logical circuit. The complementary logical gate includes an electron running layer formed by grapheme without using an n-channel FET or a p-channel FET, has the ambipolar characteristic, and uses only two FET having different threshold values, i.e., a first FET and a second FET. The first FET has a gate electrode short-circuited to a gate electrode of the second FET so as to constitute an input terminal. The first FET has a source electrode set to a low potential. The first FET has a drain electrode connected to a source electrode of the second FET so as to constitute an output terminal. The second FET has a drain electrode set to a high potential.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: July 24, 2012
    Inventors: Taiichi Otsuji, Eiichi Sano
  • Patent number: 8185071
    Abstract: A tuner module includes a filter that reduces the signal level outside the frequency band of a selected channel in an input RF signal of terrestrial television broadcasting, a local oscillation circuit that oscillates a local oscillation signal, a mixing circuit that mixes the RF signal in which the signal level outside the frequency band of the selected channel is reduced by the filter and the local oscillation signal oscillated by the local oscillation circuit to downconvert the RF signal to an intermediate frequency signal, and a control circuit that controls the local oscillation frequency of the local oscillation signal oscillated by the local oscillation circuit. The control circuit adjusts the local oscillation frequency to a value that suppresses an effect of a disturbance wave from other channels within a frequency band of the intermediate frequency signal of the selected channel.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventors: Eiichi Sano, Tomonori Nakajima
  • Publication number: 20120049160
    Abstract: The disclosed field-effect transistor has a graphene channel, and does not exhibit ambipolar properties. Specifically, the field-effect transistor has a semi-conducting substrate; a channel including a graphene layer disposed on the aforementioned semiconductor substrate; a source electrode and drain electrode comprising a metal; and a gate electrode. The aforementioned channel and the aforementioned source and drain electrodes comprising a metal are connected via a semiconductor layer.
    Type: Application
    Filed: April 1, 2010
    Publication date: March 1, 2012
    Inventors: Eiichi Sano, Taiichi Otsuji
  • Patent number: 8040173
    Abstract: A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: October 18, 2011
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Masayuki Ikebe, Eiichi Sano, Masato Koutani
  • Patent number: 8005504
    Abstract: A wireless communication apparatus is provided. The wireless communication apparatus includes wireless communication functions conforming to incompatible first and second communication standards. The wireless communication apparatus includes a first transceiver that performs a wireless communication operation conforming to the first communication standard and includes a first transmission/reception port, a second transceiver that performs a wireless communication operation conforming to the second communication standard and includes a second transmission/reception port, a shared antenna shared by the first and the second transceivers, an antenna connecting unit that connects the shared antenna and the first and the second transmission/reception ports, and a control unit that controls the communication operations in the first and the second transceivers.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: August 23, 2011
    Assignee: Sony Corporation
    Inventors: Eiichi Sano, Hiroyuki Fujita
  • Publication number: 20110156007
    Abstract: Provided is a complementary logical gate device represented by a silicon CMOS logical circuit among semiconductor integrated logical circuits which can effectively solve the problem of the speed performance limit of an ultra-large scale integration and an ultra-low power consumption type logical circuit. The complementary logical gate includes an electron running layer formed by grapheme without using an n-channel FET or a p-channel FET, has the ambipolar characteristic, and uses only two FET having different threshold values, i.e., a first FET and a second FET. The first FET has a gate electrode short-circuited to a gate electrode of the second FET so as to constitute an input terminal. The first FET has a source electrode set to a low potential. The first FET has a drain electrode connected to a source electrode of the second FET so as to constitute an output terminal. The second FET has a drain electrode set to a high potential.
    Type: Application
    Filed: July 24, 2009
    Publication date: June 30, 2011
    Inventors: Taiichi Otsuji, Eiichi Sano
  • Patent number: 7915641
    Abstract: The present invention improves the efficiency of conversion from a non-radiation two-dimensional electron plasmon wave into a radiation electromagnetic wave, and realizes a wide-band characteristic. A terahertz electromagnetic wave radiation element of the present invention comprises a semiinsulating semiconductor bulk layer, a two-dimensional electron layer formed directly above the semiconductor bulk layer by a semiconductor heterojunction structure, source and drain electrodes electrically connected to two opposed sides of the two-dimensional electron layer, a double gate electrode grating which is provided in the vicinity of and parallel to the upper surface of the two-dimensional electron layer and for which two different dc bias potentials can be alternately set, and a transparent metal mirror provided in contact with the lower surface of the semiconductor bulk layer, formed into a film shape, functioning as a reflecting mirror in the terahertz band, and being transparent in the light wave band.
    Type: Grant
    Filed: August 23, 2005
    Date of Patent: March 29, 2011
    Assignees: Kyushu Institute of Technology, National University Corporation Hokkaido University
    Inventors: Taiichi Otsuji, Eiichi Sano
  • Patent number: 7905564
    Abstract: An ink jet printer ejects ink droplets of a plurality of sizes based on image data, and prints dots of a plurality of sizes corresponding to the ink droplets of the plurality of sizes for recording the image. In the ink jet printer, in order to print a smoothing dot close to a normal dot, pulse voltage having a waveform having its printing timing changed from a waveform for printing the normal dot is applied to a piezoelectric element. As a result, an ink jet printer capable of recording high definition images can be provided.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: March 15, 2011
    Assignee: Minolta Co., Ltd.
    Inventors: Eiichi Sano, Shoichi Minato
  • Publication number: 20100225375
    Abstract: A first mixer circuit mixes a first center frequency signal with a first local oscillation signal to generate a second mixed signal, and mixes the first center frequency signal with a second local oscillation signal to generate a first mixed signal, and a second mixer circuit mixes a second center frequency signal with the first local oscillation signal to generate a fourth mixed signal, and mixes the second center frequency signal with the second local oscillation signal to generate a third mixed signal. An adder and subtracter circuit subtracts the third mixed signal from the second mixed signal to output a signal of subtraction result as a first upper side band signal, and adds the first mixed signal to the fourth mixed signal to output a signal of addition result as a second upper side band signal different in phase from the first upper side band signal by 90 degrees.
    Type: Application
    Filed: February 12, 2010
    Publication date: September 9, 2010
    Inventors: Masayuki IKEBE, Eiichi Sano, Masato Koutani
  • Publication number: 20100130148
    Abstract: A tuner module includes a filter that reduces the signal level outside the frequency band of a selected channel in an input RF signal of terrestrial television broadcasting, a local oscillation circuit that oscillates a local oscillation signal, a mixing circuit that mixes the RF signal in which the signal level outside the frequency band of the selected channel is reduced by the filter and the local oscillation signal oscillated by the local oscillation circuit to downconvert the RF signal to an intermediate frequency signal, and a control circuit that controls the local oscillation frequency of the local oscillation signal oscillated by the local oscillation circuit. The control circuit adjusts the local oscillation frequency to a value that suppresses an effect of a disturbance wave from other channels within a frequency band of the intermediate frequency signal of the selected channel.
    Type: Application
    Filed: November 19, 2009
    Publication date: May 27, 2010
    Applicant: Sony Corporation
    Inventors: Eiichi Sano, Tomonori Nakajima
  • Patent number: 7724099
    Abstract: In a high frequency oscillator circuit including first and second field effect transistors, the first field effect transistor has a gate connected to a short-stub transmission line and a drain connected to an oscillation output terminal, and the second field effect transistor has a drain connected to a source of the first field effect transistor and a grounded source. The high frequency oscillator circuit oscillates by using a feedback circuit including the short-stub transmission line and the second field effect transistor. A feedback capacitor is further provided which is connected between a gate of the second field effect transistor and the drain of the first field effect transistor.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: May 25, 2010
    Assignee: Semiconductor Technology Academic Research Center
    Inventors: Eiichi Sano, Masato Koutani
  • Publication number: 20090066744
    Abstract: An ink jet printer ejects ink droplets of a plurality of sizes based on image data, and prints dots of a plurality of sizes corresponding to the ink droplets of the plurality of sizes for recording the image. In the ink jet printer, in order to print a smoothing dot close to a normal dot, pulse voltage having a waveform having its printing timing changed from a waveform for printing the normal dot is applied to a piezoelectric element. As a result, an ink jet printer capable of recording high definition images can be provided.
    Type: Application
    Filed: November 10, 2008
    Publication date: March 12, 2009
    Applicant: MINOLTA CO., LTD.
    Inventors: Eiichi Sano, Shoichi Minato
  • Publication number: 20080315216
    Abstract: The present invention improves the efficiency of conversion from a non-radiation two-dimensional electron plasmon wave into a radiation electromagnetic wave, and realizes a wide-band characteristic. A terahertz electromagnetic wave radiation element of the present invention comprises a semiinsulating semiconductor bulk layer, a two-dimensional electron layer formed directly above the semiconductor bulk layer by a semiconductor heterojunction structure, source and drain electrodes electrically connected to two opposed sides of the two-dimensional electron layer, a double gate electrode grating which is provided in the vicinity of and parallel to the upper surface of the two-dimensional electron layer and for which two different dc bias potentials can be alternately set, and a transparent metal mirror provided in contact with the lower surface of the semiconductor bulk layer, formed into a film shape, functioning as a reflecting mirror in the terahertz band, and being transparent in the light wave band.
    Type: Application
    Filed: August 23, 2005
    Publication date: December 25, 2008
    Inventors: Taiichi Otsuji, Eiichi Sano
  • Patent number: 7448713
    Abstract: An ink jet printer ejects ink droplets of a plurality of sizes based on image data, and prints dots of a plurality of sizes corresponding to the ink droplets of the plurality of sizes for recording the image. In the ink jet printer, in order to print a smoothing dot close to a normal dot, pulse voltage having a waveform having its printing timing changed from a waveform for printing the normal dot is applied to a piezoelectric element. As a result, an ink jet printer capable of recording high definition images can be provided.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: November 11, 2008
    Assignee: Minolta Co., Ltd.
    Inventors: Eiichi Sano, Shoichi Minato
  • Publication number: 20080238566
    Abstract: In a high frequency oscillator circuit including first and second field effect transistors, the first field effect transistor has a gate connected to a short-stub transmission line and a drain connected to an oscillation output terminal, and the second field effect transistor has a drain connected to a source of the first field effect transistor and a grounded source. The high frequency oscillator circuit oscillates by using a feedback circuit including the short-stub transmission line and the second field effect transistor. A feedback capacitor is further provided which is connected between a gate of the second field effect transistor and the drain of the first field effect transistor.
    Type: Application
    Filed: March 21, 2008
    Publication date: October 2, 2008
    Applicant: Semiconductor Technology Academic Research Center
    Inventors: Eiichi Sano, Masato Koutani
  • Publication number: 20070171246
    Abstract: An ink jet printer ejects ink droplets of a plurality of sizes based on image data, and prints dots of a plurality of sizes corresponding to the ink droplets of the plurality of sizes for recording the image. In the ink jet printer, in order to print a smoothing dot close to a normal dot, pulse voltage having a waveform having its printing timing changed from a waveform for printing the normal dot is applied to a piezoelectric element. As a result, an ink jet printer capable of recording high definition images can be provided.
    Type: Application
    Filed: April 2, 2007
    Publication date: July 26, 2007
    Applicant: MINOLTA CO., LTD.
    Inventors: Eiichi Sano, Shoichi Minato