Patents by Inventor Emanuele Lopelli

Emanuele Lopelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11032113
    Abstract: Examples herein disclose apparatus and systems for hybrid vector based polar modulator schemes that may use a series of polar modulators to create a system of vector modulators. The resulting polar response may be de-composed into the sum of the polar modulators. This approach allows accurate phase modulation in two such links without the need for high resolution AM part to cover the IQ plane of a QAM modulator.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: June 8, 2021
    Assignee: QUALCOMM INCORPORATED
    Inventors: Magnus Olov Wiklund, Emanuele Lopelli
  • Patent number: 10771234
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive an otw signal that is associated with low-path pass information and transmission data. The apparatus may apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator. The apparatus may determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: September 8, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Emanuele Lopelli, Magnus Olov Wiklund, Charles Chang-I Wang, Salvatore Pennisi, Richard McConnell
  • Patent number: 10644926
    Abstract: Methods, systems, and devices for wireless communications are described. The method may include identifying phase information generated from modulation information, mapping the phase information by mapping a second phase point located in a second quadrant to a first phase point of a first quadrant, where the first phase point may be associated with a phase trajectory of the phase information, synthesizing the mapped phase information associated with the phase trajectory based on mapping the phase information, rotating the phase trajectory based on a phase-plane rotation value associated with mapping the phase information, and generating a modulated signal associated with a carrier frequency based on mapping the phase information and rotating the phase trajectory.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: May 5, 2020
    Assignee: QUALCOMM Incorporated
    Inventors: Emanuele Lopelli, Magnus Olov Wiklund, Salvatore Pennisi
  • Publication number: 20200106599
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive an otw signal that is associated with low-path pass information and transmission data. The apparatus may apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator. The apparatus may determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function.
    Type: Application
    Filed: September 28, 2018
    Publication date: April 2, 2020
    Inventors: Emanuele LOPELLI, Magnus Olov WIKLUND, Charles Chang-I WANG, Salvatore PENNISI, Richard MCCONNELL
  • Publication number: 20200099558
    Abstract: Examples herein disclose apparatus and systems for hybrid vector based polar modulator schemes that may use a series of polar modulators to create a system of vector modulators. The resulting polar response may be de-composed into the sum of the polar modulators. This approach allows accurate phase modulation in two such links without the need for high resolution AM part to cover the IQ plane of a QAM modulator.
    Type: Application
    Filed: September 25, 2018
    Publication date: March 26, 2020
    Inventors: Magnus Olov WIKLUND, Emanuele LOPELLI
  • Publication number: 20180175867
    Abstract: A method for correcting deterministic jitter in an all-digital phase-locked loop (ADPLL) is described. The method includes determining an offset to an input frequency of the ADPLL that causes an oscillator tuning word (OTW) provided to a digitally-controlled oscillator (DCO) quantizer to fall between two DCO codes. The method also includes applying the offset to the input frequency of the ADPLL to force the DCO quantizer to have gain.
    Type: Application
    Filed: December 16, 2016
    Publication date: June 21, 2018
    Inventors: Emanuele Lopelli, Charles Wang, Elias Dagher
  • Publication number: 20170371990
    Abstract: A method of calibrating an All-Digital Phase Locked Loop (ADPLL) includes obtaining a model of the ADPLL and applying an input signal to both the ADPLL and to the model. The ADPLL generates an actual output of the ADPLL, while the model generates a model output. An error between the actual output of the ADPLL and the model output is then sensed. The method also includes generating a calibration value based on the error between the actual output of the ADPLL and the model output, and adjusting a feedforward gain of the ADPLL based on the calibration value.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 28, 2017
    Inventors: Magnus Olov WIKLUND, Emanuele LOPELLI, Charles WANG
  • Patent number: 9806880
    Abstract: An example phase-locked loop (PLL) includes a digital filter, an oscillator, and a time-to-digital converter (TDC). The digital filter is configured to sample at a discrete time that is responsive to a reference clock signal received at the digital filter. The oscillator is coupled to the digital filter and configured to generate an output signal of the PLL. The TDC is coupled to the oscillator to determine a phase difference between the output signal and the reference clock signal. The TDC also provides a time signal to the digital filter that is based on the phase difference and is representative of an instantaneous rate of operation of the PLL. The digital filter is further configured to adjust a response characteristic of the digital filter according to the time signal.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: October 31, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Magnus Olov Wiklund, Emanuele Lopelli, Charles Wang, Mahbod Mofidi
  • Publication number: 20170134030
    Abstract: Disclosed are methods and apparatuses for reducing fractional spurs in an All-Digital Phase Lock Loop (ADPLL). An exemplary apparatus includes a crystal oscillator configured to generate a first frequency reference signal, a non-integer divider coupled to the crystal oscillator and configured to divide the first frequency reference signal by a non-integer variable to generate a second frequency reference signal, and a multiplexor coupled to the non-integer divider and the crystal oscillator and configured to output the first frequency reference signal or the second frequency reference signal to the ADPLL, wherein the multiplexor is configured to output the second frequency reference signal based on the ADPLL being tuned to a low fractionality channel.
    Type: Application
    Filed: May 24, 2016
    Publication date: May 11, 2017
    Inventors: Mahbod MOFIDI, Emanuele LOPELLI, Magnus Olov WIKLUND, Charles WANG
  • Patent number: 9459292
    Abstract: Aspects of the present disclosure are generally directed to techniques and apparatus for estimating a gain of a VCO in a PLL. In certain aspects, the technique includes calculating a C-V characteristic of a varactor matched to another varactor in the VCO. The technique also includes estimating the gain of the VCO based on the C-V characteristic of the varactor, a tank inductance of the VCO, and an output frequency of the VCO. Aspects of the present disclosure allow for estimating the gain of the VCO while the PLL remains in operation.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: October 4, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Emanuele Lopelli, Charles Chang-I Wang, Salvatore Pennisi, Shervin Moloudi
  • Publication number: 20150268279
    Abstract: Estimating a gain of a VCO in a PLL, including: means for matching to a varactor in the VCO; and means for estimating the gain of the VCO by calculating a C-V characteristic of the means for matching along with tank inductance and an output frequency of the VCO, wherein estimating the gain of the VCO by calculating the C-V characteristic of the means for matching allows the PLL to remain in operation during estimation.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Applicant: QUALCOMM INCORPORATED
    Inventors: Emanuele LOPELLI, Charles Chang-I WANG, Salvatore PENNISI, Shervin MOLOUDI
  • Patent number: 7738618
    Abstract: The present invention relates to a multiband PLL arrangement comprising a single loop PLL with a phase/frequency detecting means (1), a loop filter means (2) and a Voltage Controlled Oscillator (VCO) (3), to which PLL a reference voltage signal (Vref) is input. It further comprises a control circuit for appropriately locking the VCO (3) to the correct frequency band, said control circuit comprising a multi-window circuit (4) with at least first and second window amplitudes each defined by respective upper and lower voltage levels, and comparing means (5A, 5B) are provided for comparing a first VCO control voltage output from the loop filter means (2) with the upper and lower voltage levels of a first, broadest amplitude window.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: June 15, 2010
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventors: Harald Jacobsson, Emanuele Lopelli
  • Publication number: 20090141825
    Abstract: The present invention relates to a multiband PLL arrangement comprising a single loop PLL, with a phase/frequency detecting means (1), a loop filter means (2) and a Voltage Controlled Oscillator (VCO) (3), to which PLI a reference voltage signal (Vref) is input. It further comprises a control circuit for appropriately locking the VCO (3) to the correct frequency band, said control circuit comprising a multi-window circuit (4) with at least first and second window amplitudes each defined by respective upper and lower voltage levels, and comparing means (5A, 5B) are provided for comparing a first VCO control voltage output from the loop filter means (2) with the upper and lower voltage levels of a first, broadest amplitude window.
    Type: Application
    Filed: October 23, 2003
    Publication date: June 4, 2009
    Applicant: Telefonaktiebolaget L M Ericson (publ)
    Inventors: Harald Jacobsson, Emanuele Lopelli