Patents by Inventor Erdem Arkun

Erdem Arkun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8846504
    Abstract: A method of growing GaN material on a silicon substrate includes providing a single crystal silicon substrate with a (100) surface orientation or a (100) with up to a 10° offset surface orientation and using epi-twist technology, epitaxially growing a single crystal stress managing layer on the silicon substrate. The single crystal stress managing layer includes rare earth oxide with a (110) crystal orientation and a cubic crystal structure. The method further includes epitaxially growing a single crystal buffer layer on the stress managing layer. The single crystal buffer layer includes rare earth oxide with a lattice spacing closer to a lattice spacing of GaN than the rare earth oxide of the stress managing layer. Epitaxially growing a layer of single crystal GaN material on the surface of the buffer, the GaN material having one of a (11-20) crystal orientation and a (0001) crystal orientation.
    Type: Grant
    Filed: November 8, 2013
    Date of Patent: September 30, 2014
    Assignee: Translucent, Inc.
    Inventors: Rytis Dargis, Andrew Clark, Erdem Arkun, Radek Roucka
  • Patent number: 8835955
    Abstract: A silicon-on-insulator (SOI) substrate structure and method of fabrication including a single crystal silicon substrate, a layer of single crystal rare earth oxide formed on the substrate, a layer of engineered single crystal silicon formed on the layer of single crystal rare earth oxide, and a single crystal insulator layer of IIIOxNy formed on the engineered single crystal silicon layer. In some embodiments the III material in the insulator layer includes more than on III material. In a preferred embodiment the single crystal rare earth oxide includes Gd2O3 and the single crystal insulator layer of IIIOxNy includes one of AlOxNy and AlGaOxNy.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: September 16, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Rytis Dargis, Andrew Clark, Michael Lebby
  • Publication number: 20140246679
    Abstract: III-N material grown on a buffer on a silicon substrate includes a single crystal electrically insulating buffer positioned on a silicon substrate. The single crystal buffer includes rare earth aluminum nitride substantially crystal lattice matched to the surface of the silicon substrate, i.e. a lattice co-incidence between REAlN and Si better than a 5:4 ratio. A layer of single crystal III-N material is positioned on the surface of the buffer and substantially crystal lattice matched to the surface of the buffer.
    Type: Application
    Filed: March 4, 2013
    Publication date: September 4, 2014
    Inventors: Erdem Arkun, Andrew Clark, Rytis Dargis
  • Patent number: 8823025
    Abstract: III-N material grown on a silicon substrate includes a single crystal buffer positioned on a silicon substrate. The buffer is substantially crystal lattice matched to the surface of the silicon substrate and includes aluminum oxynitride adjacent the substrate and aluminum nitride adjacent the upper surface. A first layer of III-N material is positioned on the upper surface of the buffer. An inter-layer of aluminum nitride (AlN) is positioned on the first III-N layer and an additional layer of III-N material is positioned on the inter-layer. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: September 2, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Patent number: 8823055
    Abstract: A method of forming a template on a silicon substrate includes providing a single crystal silicon substrate. The method further includes epitaxially depositing a layer of rare earth oxide on the surface of the silicon substrate. The rare earth oxide being substantially crystal lattice matched to the surface of the silicon substrate. The method further includes forming an aluminum oxide layer on the rare earth oxide, the aluminum oxide being substantially crystal lattice matched to the surface of the rare earth oxide and epitaxially depositing a layer of aluminum nitride (AlN) on the aluminum oxide layer substantially crystal lattice matched to the surface of the aluminum oxide.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: September 2, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Publication number: 20140239307
    Abstract: A rare earth oxide gate dielectric on III-N material grown on a silicon substrate includes a single crystal stress compensating template positioned on a silicon substrate. The stress compensating template is substantially crystal lattice matched to the surface of the silicon substrate. A GaN structure is positioned on the surface of the stress compensating template and substantially crystal lattice matched thereto. An active layer of single crystal III-N material is grown on the GaN structure and substantially crystal lattice matched thereto. A single crystal rare earth oxide dielectric layer is grown on the active layer of III-N material.
    Type: Application
    Filed: February 22, 2013
    Publication date: August 28, 2014
    Inventors: RYTIS DARGIS, ROBIN SMITH, ANDREW CLARK, ERDEM ARKUN, MICHAEL LEBBY
  • Publication number: 20140231818
    Abstract: III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer. A cap layer of AlN is grown on the final III-N layer and a III-N layer of material with one of an LED structure and an HEMT structure is grown on the AlN cap layer.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Publication number: 20140231817
    Abstract: III-N material grown on a silicon substrate includes a single crystal buffer positioned on a silicon substrate. The buffer is substantially crystal lattice matched to the surface of the silicon substrate and includes aluminum oxynitride adjacent the substrate and aluminum nitride adjacent the upper surface. A first layer of III-N material is positioned on the upper surface of the buffer. An inter-layer of aluminum nitride (AlN) is positioned on the first III-N layer and an additional layer of III-N material is positioned on the inter-layer. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.
    Type: Application
    Filed: February 20, 2013
    Publication date: August 21, 2014
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Publication number: 20140225123
    Abstract: A III-N template formed on a silicon substrate includes a Distributed Bragg Reflector positioned on the silicon substrate. The Distributed Bragg Reflector is substantially crystal lattice matched to the surface of the silicon substrate. An aluminum oxide layer is positioned on the surface of the Distributed Bragg Reflector and substantially crystal lattice matched to the surface of the Distributed Bragg Reflector. A layer of aluminum nitride (AlN) is positioned on the surface of the aluminum oxide layer and substantially crystal lattice matched to the surface of the aluminum oxide layer. A III-N LED structure including at least one III-N layer can then be grown on the aluminum nitride layer and substantially crystal lattice matched to the surface of the aluminum nitride layer.
    Type: Application
    Filed: February 13, 2014
    Publication date: August 14, 2014
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Patent number: 8796121
    Abstract: A method of forming a REO dielectric layer and a layer of a-Si between a III-N layer and a silicon substrate. The method includes depositing single crystal REO on the substrate. The single crystal REO has a lattice constant adjacent the substrate matching the lattice constant of the substrate and a lattice constant matching a selected III-N material adjacent an upper surface. A uniform layer of a-Si is formed on the REO. A second layer of REO is deposited on the layer of a-Si with the temperature required for epitaxial growth crystallizing the layer of a-Si and the crystallized silicon being transformed to amorphous silicon after transferring the lattice constant of the selected III-N material of the first layer of REO to the second layer of REO, and a single crystal layer of the selected III-N material deposited on the second layer of REO.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: August 5, 2014
    Assignee: Translucent, Inc.
    Inventors: Rytis Dargis, Andrew Clark, Erdem Arkun
  • Publication number: 20140167057
    Abstract: A method of forming a template on a silicon substrate includes providing a single crystal silicon substrate. The method further includes epitaxially depositing a layer of rare earth oxide on the surface of the silicon substrate. The rare earth oxide being substantially crystal lattice matched to the surface of the silicon substrate. The method further includes forming an aluminum oxide layer on the rare earth oxide, the aluminum oxide being substantially crystal lattice matched to the surface of the rare earth oxide and epitaxially depositing a layer of aluminum nitride (AlN) on the aluminum oxide layer substantially crystal lattice matched to the surface of the aluminum oxide.
    Type: Application
    Filed: December 17, 2012
    Publication date: June 19, 2014
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Patent number: 8748900
    Abstract: A method of fabricating a rare earth silicide gate electrode on III-N material grown on a silicon substrate includes growing a single crystal stress compensating template on a silicon substrate. The template is substantially crystal lattice matched to the surface of the silicon substrate. A single crystal GaN structure is grown on the surface of the template and substantially crystal lattice matched to the template. An active layer of single crystal III-N material is grown on the GaN structure and substantially crystal lattice matched to the GaN structure. A single crystal monoclinic rare earth oxide dielectric layer is grown on the active layer of III-N material and a single crystal rare earth silicide gate electrode is grown on the dielectric layer, the silicide. Relative portions of the gadolinium metal and the silicon are adjusted during deposition so they react to form rare earth silicide during deposition.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: June 10, 2014
    Assignee: Translucent, Inc.
    Inventors: Rytis Dargis, Andrew Clark, Erdem Arkun, Robin Smith, Michael Lebby
  • Patent number: 8679953
    Abstract: A method of forming a template on a silicon substrate includes the step of providing a single crystal silicon substrate having a protective layer of amorphous silicon oxide on an upper surface thereof. A working area is delineated on the upper surface of the silicon substrate and a rare earth metal oxide is formed on the upper surface of the silicon substrate within the working area. The rare earth metal oxide is crystal lattice matched to the upper surface of the silicon substrate to form a template for further operations and portions of the upper surface outside the working area are covered with the protective layer of amorphous silicon oxide.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: March 25, 2014
    Assignee: Translucent, Inc.
    Inventors: Andrew Clark, Erdem Arkun, Radek Roucka
  • Patent number: 8680507
    Abstract: A DBR/gallium nitride/aluminum nitride base grown on a silicon substrate includes a Distributed Bragg Reflector (DBR) positioned on the silicon substrate. The DBR is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the DBR, an inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: March 25, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Patent number: 8664735
    Abstract: A pumped sensor system includes a substrate with a first layer formed thereon and doped for a first type conduction and a second layer doped for a second type conduction, whereby the first and second layers form a silicon light detector at an up-conversion wavelength. A ternary rare earth oxide is formed on the second layer and crystal lattice matched to the second layer. The oxide is a crystalline bulk oxide with a controlled percentage of an up-conversion component and a majority component. The majority component is insensitive to any of pump, sense, or up-conversion wavelengths and the up-conversion component is selected to produce energy at the up-conversion wavelength in response to receiving energy at the pump and sense wavelengths. The layer of oxide defines a light input area sensitive to a pump wavelength and a light input area sensitive to a sense wavelength.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: March 4, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Rytis Dargis, Andrew Clark, David L. Williams
  • Patent number: 8633569
    Abstract: III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: January 21, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark, Rytis Dargis
  • Patent number: 8623747
    Abstract: A method of forming a template on a silicon substrate includes providing a single crystal silicon substrate. The method further includes forming an aluminum oxide coating on the surface of the silicon substrate, the aluminum oxide being substantially crystal lattice matched to the surface of the silicon substrate and epitaxially depositing a layer of aluminum nitride (AlN) on the aluminum oxide coating substantially crystal lattice matched to the surface of the aluminum nitride.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: January 7, 2014
    Assignee: Translucent, Inc.
    Inventors: Erdem Arkun, Michael Lebby, Andrew Clark
  • Publication number: 20130248853
    Abstract: A method of fabricating a layer of single crystal III-N material on a silicon substrate includes epitaxially growing a REO template on a silicon substrate. The template includes a REO layer adjacent the substrate with a crystal lattice spacing substantially matching the crystal lattice spacing of the substrate and selected to protect the substrate from nitridation. Either a rare earth oxynitride or a rare earth nitride is formed adjacent the upper surface of the template and a layer of single crystal III-N material is epitaxially grown thereon.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 26, 2013
    Inventors: Erdem Arkun, Andrew Clark, Rytis Dargis, Radek Roucka, Michael Lebby
  • Patent number: 8542437
    Abstract: The present invention relates to semiconductor devices comprising rare earth based optical gain medium layers suitable for electronic and optoelectronic applications.
    Type: Grant
    Filed: March 9, 2011
    Date of Patent: September 24, 2013
    Assignee: Translucent, Inc.
    Inventors: Michael S. Lebby, Andrew Clark, F. Erdem Arkun, Robin Smith, David Williams
  • Publication number: 20130214282
    Abstract: A method of fabricating a layer of single crystal semiconductor material on a silicon substrate including providing a crystalline silicon substrate and epitaxially depositing a nano structured interface layer on the substrate. The nano structured interface layer has a thickness up to a critical thickness. The method further includes epitaxially depositing a layer of single crystal semiconductor material in overlying relationship to the nano structured interface layer. Preferably, the method includes the nano structured interface layer being a layer of coherently strained nano dots of selected material. The critical thickness of the nano dots includes a thickness up to a thickness at which the nano dots become incoherent.
    Type: Application
    Filed: February 17, 2012
    Publication date: August 22, 2013
    Inventors: Erdem Arkun, Radek Roucka, Andrew Clark, Robin Smith, Michael Lebby