Patents by Inventor Eric Dujardin

Eric Dujardin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220036524
    Abstract: The various embodiments of the present disclosure are directed towards methods for tone mapping High-Dynamic-Range (HDR) image data, as well as controlling the brightness of the image encoded by HDR the image data and/or the tone-mapped image data. HDR image is captured. A tone mapping function for the HDR image data is generated. To generate the tone mapping function, control points are dynamically determined based on an analysis of the HDR image data. The tone mapping function is fit to the control points. The tone mapping function is a non-linear function, and is described by a curve in a plane. The shape of the curve is constrained by a line generated from a portion of the control points. The tone mapping function is applied to the HDR image data. A color-compression is applied to the tone mapped image data to generate Standard Dynamic Range or Low Dynamic Range image data.
    Type: Application
    Filed: October 13, 2021
    Publication date: February 3, 2022
    Inventors: Yining Deng, Eric Dujardin, Hamidreza Mirzaei Domabi, Sung Hyun Hwang
  • Patent number: 11182884
    Abstract: The various embodiments of the present disclosure are directed towards methods for tone mapping High-Dynamic-Range (HDR) image data, as well as controlling the brightness of the image encoded by HDR the image data and/or the tone-mapped image data. HDR image is captured. A tone mapping function for the HDR image data is generated. To generate the tone mapping function, control points are dynamically determined based on an analysis of the HDR image data. The tone mapping function is fit to the control points. The tone mapping function is a non-linear function, and is described by a curve in a plane. The shape of the curve is constrained by a line generated from a portion of the control points. The tone mapping function is applied to the HDR image data. A color-compression is applied to the tone mapped image data to generate Standard Dynamic Range or Low Dynamic Range image data.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: November 23, 2021
    Assignee: NVIDIA Corporation
    Inventors: Yining Deng, Eric Dujardin, Hamidreza Mirzaei Domabi, Sung Hyun Hwang
  • Publication number: 20210149670
    Abstract: Apparatuses, systems, and techniques to optimize memory usage when performing matrix operations. In at least one embodiment, a matrix is optimized to limit memory and storage requirements while minimizing loss of precision for a sum of the members of the matrix.
    Type: Application
    Filed: November 14, 2019
    Publication date: May 20, 2021
    Inventors: Michael Stevens, Amit Purwar, Sean Pieper, Eric Dujardin
  • Publication number: 20210035273
    Abstract: The various embodiments of the present disclosure are directed towards methods for tone mapping High-Dynamic-Range (HDR) image data, as well as controlling the brightness of the image encoded by HDR the image data and/or the tone-mapped image data. HDR image is captured. A tone mapping function for the HDR image data is generated. To generate the tone mapping function, control points are dynamically determined based on an analysis of the HDR image data. The tone mapping function is fit to the control points. The tone mapping function is a non-linear function, and is described by a curve in a plane. The shape of the curve is constrained by a line generated from a portion of the control points. The tone mapping function is applied to the HDR image data. A color-compression is applied to the tone mapped image data to generate Standard Dynamic Range or Low Dynamic Range image data.
    Type: Application
    Filed: July 30, 2019
    Publication date: February 4, 2021
    Inventors: Yining Deng, Eric Dujardin, Hamidreza Mirzaei Domabi, Sung Hyun Hwang
  • Publication number: 20200226720
    Abstract: In order to more accurately white balance an image, weightings can be determined for pixels of an image when computing an illuminant color value of the image and/or a scene. The weightings can be based at least in part on the Signal-to-Noise Ratio (SNR) of the pixels. The SNR may be actual SNR or SNR estimated from brightness levels of the pixels. SNR weighting (e.g., SNR adjustment) may reduce the effect of pixels with high noise on the computed illuminant color value. For example, one or more channel values of the illuminant color value can be determined based on the weightings and color values of the pixels. One or more color gain values can be determined based on the one or more channel values of the illuminant color value and used to white balance the image.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 16, 2020
    Inventors: Hamidreza Mirzaei Domabi, Eric Dujardin, Animesh Khemka, Yining Deng
  • Patent number: 8042425
    Abstract: A multi-axis robot for high-speed applications comprises a first and a second guide rail arranged substantially parallel to each other for defining a first axis of motion. A crossbar having a first end and a second end is moveably supported on the guide rails. A carriage is moveably coupled to the crossbar for moving along a second axis of motion. A first drive system having first and second drives and a first belt running along a first H-shaped belt path provides for a movement of the carriage along the first and second axis of motion. Second and third belts extend at least partially along the crossbar and the guide rails. The second and third belts run along different second and third belt paths, with one of the second and third belts entering the crossbar with a right-hand turn and leaving the crossbar with a left-hand turn, and the other one of the second and third belts entering the crossbar with a left-hand turn and leaving the crossbar with a right-hand turn.
    Type: Grant
    Filed: November 11, 2008
    Date of Patent: October 25, 2011
    Assignee: Pilz GmbH & Co. KG
    Inventor: Paul-Eric Dujardin
  • Publication number: 20090155039
    Abstract: A multi-axis robot for high-speed applications comprises a first and a second guide rail arranged substantially parallel to each other for defining a first axis of motion. A crossbar having a first end and a second end is moveably supported on the guide rails. A carriage is moveably coupled to the crossbar for moving along a second axis of motion. A first drive system having first and second drives and a first belt running along a first H-shaped belt path provides for a movement of the carriage along the first and second axis of motion. Second and third belts extend at least partially along the crossbar and the guide rails. The second and third belts run along different second and third belt paths, with one of the second and third belts entering the crossbar with a right-hand turn and leaving the crossbar with a left-hand turn, and the other one of the second and third belts entering the crossbar with a left-hand turn and leaving the crossbar with a right-hand turn.
    Type: Application
    Filed: November 11, 2008
    Publication date: June 18, 2009
    Inventor: Paul-Eric DUJARDIN
  • Patent number: 7085326
    Abstract: The invention presents a programmable communication system for generating data for at least one processing unit at a fixed symbol frequency, which lies within a range of frequencies, on the basis of input samples received at an input frequency higher than the symbol frequency. To achieve this, communication time slots are reserved periodically as a function of the maximum envisaged symbol frequency, and the device is designed for using only a fraction of these slots reserved as a function of the fixed symbol frequency for transmitting the generated data. The invention is applicable to broadband digital communications, digital television, channel decoding, demodulation and other similar technology areas.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: August 1, 2006
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Olivier Gay-Bellile, Eric Dujardin
  • Patent number: 6952709
    Abstract: The invention offers a method of calculating digital filters enabling to multiplex various different filters with the aid of a programmable co-processor circuit comprising a calculation element and memory registers. The invention comprises making an anticipated calculation of part of the result of the current filter before the last data included in the calculation of this result has arrived. For this purpose, successive products between predetermined filter coefficients and the corresponding input data which have already been used for the calculation of the preceding results are accumulated in an iterative fashion in an intermediate result in order to anticipate the calculation of the current result. The calculation of the last intermediate result for each final result is triggered each time a new input data is received, so that each filter result is immediately available once the last input data involved in this result has been received.
    Type: Grant
    Filed: February 23, 2000
    Date of Patent: October 4, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric Dujardin, Olivier Gay-Bellile
  • Patent number: 6940921
    Abstract: A device provides a normally static and nevertheless programmable architecture, for example, a programmable digital demodulator. The device includes a first and a second processor module. The second module receives data and instructions and executes operations for obtaining a result. The first module transmits instructions to the second module according to a predetermined scheme, each instruction indicating the operation it is provided to execute in the current time slot. An operation is only executed by the second module if the necessary data are available. It is not possible to execute a different operation from the one that is provided in the current time slot. Thus, no result can be delivered outside the time slots provided for this purpose.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: September 6, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric Dujardin, Olivier Gay-Bellile
  • Patent number: 6839357
    Abstract: The invention provides a programmable network architecture for interconnecting several calculation modules in a receiver of a data transmission system with a very high data rate, which receiver comprises a forward and a return communication path. The architecture renders it possible to realize local communications between neighboring calculation modules and global communications between non-neighboring calculation modules. The network is formed by a sequence of programmable interconnection cells comprising memory means for storing the data which traverse between two non-neighboring modules which are present in the forward path and the return path, respectively. The role of these memories is to guarantee that the data pass through at most two successive multiplexers in one clock cycle, so that a high clock speed can be chosen.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: January 4, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Olivier Gay-Bellile, Eric Dujardin
  • Patent number: 6792060
    Abstract: The invention relates to a processing device for digital data which is capable of processing data which have been sampled with a sampling clock which may have any value whatsoever with respect to the basic clock of the device. To achieve this, the device is provided with means for generating from its basic clock an operational clock which is a function of the sampling clock of the data to be processed. This operational clock has a constant integer number of active periods during one cycle of the sampling clock. Application: Digital communication systems, especially demodulation.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: September 14, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric Dujardin, Olivier Gay-Bellile
  • Patent number: 6754281
    Abstract: The invention relates to a digital demodulator whose architecture is adapted to multicarrier modulations (radio wave transmissions), but which remains suitable for use for monocarrier modulations (cable and satellite transmissions). With multicarrier modulations, the demodulator must carry out certain functions at a frequency of the order of sampling frequency and other functions at a frequency of the order of the symbol frequency. The invention comprises a separation of the architecture into three modules: a first module which carries out programs which are repeated with a first frequency, a second module capable of using programs which are repeated with a second frequency, and an interface module between the first and the second module. An advantage is that the memory size necessary for storing instructions for the first module is reduced. An application is for DVB standard transmission of digital TV programs.
    Type: Grant
    Filed: May 10, 2000
    Date of Patent: June 22, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Eric Dujardin, Olivier Gay-Bellile
  • Publication number: 20040045861
    Abstract: The present invention relates to a packaged product comprising flexible liquid-filled pouches and an outer container for containing the liquid-filled pouches; wherein the outer container contains a plurality of flexible liquid-filled pouches whereby at least two or more of the flexible liquid-filled pouches are in mutual contact, and in that the outer container further comprises means for avoiding or minimizing rupture of the flexible liquid-filled pouches when the outer container is subject to shock.
    Type: Application
    Filed: September 5, 2003
    Publication date: March 11, 2004
    Applicant: The Procter & Gamble Company
    Inventors: Sonya Ann Curry, Laurent Eric Dujardin, Michael Felix Spruyt
  • Publication number: 20030050944
    Abstract: The invention relates to a device (FFTP) for computing discrete transforms. The device comprises a local memory (RAM2) for registering results of sub-transform computations, a sub-transform computation comprising several computation layers. The device is characterized by computation means (CAL_M) which are capable of interlacing computation layers of two or several consecutive sub-transforms of the same size.
    Type: Application
    Filed: August 16, 2002
    Publication date: March 13, 2003
    Inventors: Olivier Gay-Bellile, Eric Dujardin
  • Publication number: 20020039392
    Abstract: The invention relates to a device which comprises a first and a second processor module. The second module M2 is intended to receive data and instructions and to execute operations for obtaining a result. The first module is intended to transmit instructions to the second module according to a predetermined scheme, each instruction indicating the operation it is provided to execute in the current time slot.
    Type: Application
    Filed: May 15, 2001
    Publication date: April 4, 2002
    Inventors: Eric Dujardin, Olivier Gay-Bellile
  • Patent number: 6308191
    Abstract: A memory system is disclosed. The memory system provides for input data (datain_B and datain_F) and for taps (w_in) and is partitioned into various segments. The memory system includes means for recombining the segments in order to be adapted to different filters. In one embodiment, with the total dimension of the memory being 2L, the memory system includes six partitions having respective dimensions 2L/5, 4L/15, L/3, L/5, 2L/15, 2L/3, between which the data and taps are distributed by means of multiplexers.
    Type: Grant
    Filed: March 9, 1999
    Date of Patent: October 23, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Eric Dujardin, Olivier Gay-Bellile
  • Patent number: 6279020
    Abstract: An apparatus having plurality of filter processing elements is provided in order to obtain adequate calculation power, particularly to enable a plurality of filters to be calculated by multiplexing. The calculation of a filter is effected in a plurality of iterations; a filter section is calculated in each iteration while the same operator is used for iteratively calculating a plurality of operations and a plurality of multiplexed filters; in each iteration a plurality of data sets is used. Each filter processing element comprises a number of partial-result registers (y-data) equal to the number of filters that can be multiplexed. Each register has a write input connected to the output (y) of a final adder and each register has a read output connected to one of the inputs (y-old) of the final adder.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: August 21, 2001
    Assignee: U.S. Philips Corporation
    Inventors: Eric Dujardin, Olivier Gay-Bellile