Abstract: A method for managing a metrology system includes receiving a part, identifying, with a processing device, a part type associated with the part, retrieving, with the processing device, test rule logic associated with the part type from a database, retrieving, with the processing device, measurement data associated with the identified part type, processing, with the processing device, the measurement data, applying, with the processing device, the test rule logic to the processed measurement data to determine whether the part should be measured, outputting the part responsive to determining that the part should not be measured, and incrementing, with the processing device, a counter and saving a value of the counter in the database responsive to outputting the part responsive to determining that the part should not be measured.

Abstract: A method for measuring a dimension of a device includes receiving an image of a portion of the device, receiving a first offset value and a second offset value, processing the image to define a least one graph of a line of pixels, the at least one graph including the brightness level of each pixel in a line of pixels, identifying a location of a first peak and a second peak in the graph, defining a first exclusion area boundary, defining a second exclusion area boundary, setting the brightness level of the pixels between the first exclusion area boundary and the second exclusion area boundary to zero, identifying a first portion of the feature of interest and a second portion of the feature of interest, and measuring a distance between the first portion of the feature of interest and the second portion of the feature of interest.

Abstract: A method for managing a metrology system includes receiving a part, identifying, with a processing device, a part type associated with the part, retrieving, with the processing device, test rule logic associated with the part type from a database, retrieving, with the processing device, measurement data associated with the identified part type, processing, with the processing device, the measurement data, applying, with the processing device, the test rule logic to the processed measurement data to determine whether the part should be measured, outputting the part responsive to determining that the part should not be measured, and incrementing, with the processing device, a counter and saving a value of the counter in the database responsive to outputting the part responsive to determining that the part should not be measured.

Abstract: A method for measuring a dimension of a device includes receiving an image of a portion of the device, receiving a first offset value and a second offset value, processing the image to define a least one graph of a line of pixels, the at least one graph including the brightness level of each pixel in a line of pixels, identifying a location of a first peak and a second peak in the graph, defining a first exclusion area boundary, defining a second exclusion area boundary, setting the brightness level of the pixels between the first exclusion area boundary and the second exclusion area boundary to zero, identifying a first portion of the feature of interest and a second portion of the feature of interest, and measuring a distance between the first portion of the feature of interest and the second portion of the feature of interest.

Abstract: A system and method for optimizing and implementing a metrology sampling plan. A system is provided that includes a system for collecting historical metrology data from a metrology tool; and a reduction analysis system that compares an initial capability calculated from the historical metrology data with a recalculated capability for a reduced data set, wherein the reduced data set is obtained by removing a subset of data from the historical metrology data.

Abstract: A test method for measuring adsorbed molecular contamination uses a test structure that includes a substrate comprising a plurality of separated test sites having a plurality separate thicknesses having a base design thickness and a designed thickness interrelationship. The test structure is exposed to a molecular contaminant environment to provide an adsorbed molecular contaminant layer upon each of the plurality of separated test sites. The plurality of separated test sites with the adsorbed molecular contaminant layer thereon is measured. An appropriate algorithm that considers the designed thickness interrelationship is used to determine at least one of: (1) the base design thickness; and (2) a thickness of the adsorbed molecular contaminant layer.

Abstract: A method of preparing recipes of operating a metrology tool, wherein each recipe includes a set of instructions for measuring at least one dimension in a microelectronic feature. There is provided a desired recipe having instructions for measuring one or more desired dimensions, the desired recipe or portion thereof including a summary of parameters relating to metrology tool function with respect to the microelectronic feature dimension to be measured. The method includes comparing the instructions in the desired recipe with the instructions in a database, identifying differences between the instructions in the desired recipe and the instructions in the database, modifying the instructions in the desired recipe to conform to the instructions in the database, verifying the desired recipe prior to using the modified desired recipe by the metrology tool, and using the desired recipe to execute a microelectronic feature measurement on the metrology tool.

Abstract: A method for reducing edge effect interference with critical dimension (CD) measurement of semiconductor via structures includes forming a test structure in a kerf region of a semiconductor wafer, the test structure including at least a via structure and a trench structure in contact with the via structure. The via structure is formed in accordance with a critical dimension associated with a corresponding via structure in a circuit region of the semiconductor wafer, and the trench structure is formed in accordance with a widened dimension with respect to a minimum ground rule dimension associated with a corresponding trench structure in a circuit region of the semiconductor wafer.

Abstract: A method for reducing edge effect interference with critical dimension (CD) measurement of semiconductor via structures includes forming a test structure in a kerf region of a semiconductor wafer, the test structure including at least a via structure and a trench structure in contact with the via structure. The via structure is formed in accordance with a critical dimension associated with a corresponding via structure in a circuit region of the semiconductor wafer, and the trench structure is formed in accordance with a widened dimension with respect to a minimum ground rule dimension associated with a corresponding trench structure in a circuit region of the semiconductor wafer.

Abstract: A method, system and program product are disclosed for optimizing a fleet of measurement systems. One embodiment determines a tool matching precision (TMP) and a fleet measurement precision (FMP) and normalizes these metrics across applications. An optimization is carried out in which usage weighting factors are assigned to each measurement system while enforcing usage enforcement rule(s) to ensure that each measurement system is optimally used and each application is adequately covered. The optimization re-assigns usage weighting factors to minimize a normalized FMP metric and enforce the usage enforcement rule(s).

Abstract: Methods, systems and program products are disclosed for determining whether a measurement system under test (MSUT) matches a fleet including at least one other measurement system. The invention implements realistic parameters for analyzing a matching problem including single tool precision, tool-to-tool non-linearities and tool-to-tool offsets. A bottom-line tool matching precision metric that combines these parameters into a single value is then implemented. The invention also includes methods for determining a root cause issue of a matching problem, and for determining a fleet measurement precision metric. Method, system and program product are also disclosed for attempting to determine a root cause of a subject problem related to at least one of a measurement system under test (MSUT) and a fleet of at least one other measurement system.

Abstract: A system and method for optimizing and implementing a metrology sampling plan. A system is provided that includes a system for collecting historical metrology data from a metrology tool; and a reduction analysis system that compares an initial capability calculated from the historical metrology data with a recalculated capability for a reduced data set, wherein the reduced data set is obtained by removing a subset of data from the historical metrology data.

Abstract: A system and method for optimizing and implementing a metrology sampling plan. A system is provided that includes a system for collecting historical metrology data from a metrology tool; and a reduction analysis system that compares an initial capability calculated from the historical metrology data with a recalculated capability for a reduced data set, wherein the reduced data set is obtained by removing a subset of data from the historical metrology data.

Abstract: A structure, a system and a method are directed towards determination of a dimension of a patterned dimensionally unstable layer when the dimension is measured using an apparatus that induces a variation of the dimension. The structure, system and method use a patterned dimensionally unstable layer pattern design that correlates with an algorithm used to determine the dimension when the dimension is measured using the apparatus that induces the variation of the dimension.

Abstract: Methods, systems and program products are disclosed for determining whether a measurement system under test (MSUT) matches a fleet including at least one other measurement system. The invention implements realistic parameters for analyzing a matching problem including single tool precision, tool-to-tool non-linearities and tool-to-tool offsets. A bottom-line tool matching precision metric that combines these parameters into a single value is then implemented. The invention also includes methods for determining a root cause of a matching problem, and for determining a fleet measurement precision metric.

Abstract: A method for reducing edge effect interference with critical dimension (CD) measurement of semiconductor via structures includes forming a test structure in a kerf region of a semiconductor wafer, the test structure including at least a via structure and a trench structure in contact with the via structure. The via structure is formed in accordance with a critical dimension associated with a corresponding via structure in a circuit region of the semiconductor wafer, and the trench structure is formed in accordance with a widened dimension with respect to a minimum ground rule dimension associated with a corresponding trench structure in a circuit region of the semiconductor wafer.

Abstract: A method for accurately measuring feature sizes and quantifying the beam spot size in a CDSEM at real time is provided. The inventive method is based on a scanning microscope and it works on both conductive and non-conductive features. The measurement of conductive feature includes first providing a conductive feature on a surface of a substrate (the substrate maybe an insulator, a semiconductor or a material stack thereof). The conductive feature is then connected to ground and thereafter an electron beam probe raster scans the sample. When the electron beam probe hits the conductive feature the spot will have a negative potential. The potential difference between the spot and the ground will induce an electrical current flow. When the electrical beam is off the conductive feature, there will be no current flow. Therefore, by measuring the current response to the location of the beam spot, the dimension of the conductive feature can be derived.

Abstract: A test method for measuring adsorbed molecular contamination uses a test structure that includes a substrate comprising a plurality of separated test sites having a plurality separate thicknesses having a base design thickness and a designed thickness interrelationship. The test structure is exposed to a molecular contaminant environment to provide an adsorbed molecular contaminant layer upon each of the plurality of separated test sites. The plurality of separated test sites with the adsorbed molecular contaminant layer thereon is measured. An appropriate algorithm that considers the designed thickness interrelationship is used to determine at least one of: (1) the base design thickness; and (2) a thickness of the adsorbed molecular contaminant layer.

Abstract: A method, system and program product are disclosed for optimizing a fleet of measurement systems. One embodiment determines a tool matching precision (TMP) and a fleet measurement precision (FMP) and normalizes these metrics across applications. An optimization is carried out in which usage weighting factors are assigned to each measurement system while enforcing usage enforcement rule(s) to ensure that each measurement system is optimally used and each application is adequately covered. The optimization re-assigns usage weighting factors to minimize a normalized FMP metric and enforce the usage enforcement rule(s).

Abstract: A test method for measuring adsorbed molecular contamination uses a test structure that includes a substrate comprising a plurality of separated test sites having a plurality separate thicknesses having a base design thickness and a designed thickness interrelationship. The test structure is exposed to a molecular contaminant environment to provide an adsorbed molecular contaminant layer upon each of the plurality of separated test sites. The plurality of separated test sites with the adsorbed molecular contaminant layer thereon is measured. An appropriate algorithm that considers the designed thickness interrelationship is used to determine at least one of: (1) the base design thickness; and (2) a thickness of the adsorbed molecular contaminant layer.