Patents by Inventor Fadi Kurdahi

Fadi Kurdahi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240005162
    Abstract: The present disclosure presents neural network learning systems and methods. One such method comprises receiving an input current signal; converting the input current signal to an input voltage pulse signal utilized by a memristive neuromorphic hardware of a multi-layered spiked neural network module; transmitting the input voltage pulse signal to the memristive neuromorphic hardware of the multi-layered spiked neural network module; performing a layer-by-layer calculation and conversion on the input voltage pulse signal to complete an on-chip learning to obtain an output signal; sending the output signal to a weight update circuitry module; and/or calculating, by the weight update circuitry module, an error signal and based on a magnitude of the error signal, triggering an adjustment of a conductance value of the memristive neuromorphic hardware so as to update synaptic weight values stored by the memristive neuromorphic hardware. Other methods and systems are also provided.
    Type: Application
    Filed: November 19, 2021
    Publication date: January 4, 2024
    Inventors: Mohammed FOUDA, Emre NEFTCI, Fadi KURDAHI, Ahmed ELTAWIL, Melika PAYVAND
  • Patent number: 11714727
    Abstract: A stuck-at fault mitigation method for resistive random access memory (ReRAM)-based deep learning accelerators, includes: confirming a distorted output value (Y0) due to a stuck-at fault (SAF) by using a correction data set in a pre-trained deep learning network, by means of ReRAM-based deep learning accelerator hardware; updating an average (?) and a standard deviation (?) of a batch normalization (BN) layer by using the distorted output value (Y0), by means of the ReRAM-based deep learning accelerator hardware; folding the batch normalization (BN) layer in which the average (?) and the standard deviation (?) are updated into a convolution layer or a fully-connected layer, by means of the ReRAM-based deep learning accelerator hardware; and deriving a normal output value (Y1) by using the deep learning network in which the batch normalization (BN) layer is folded, by means of the ReRAM-based deep learning accelerator hardware.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: August 1, 2023
    Assignees: UNIST ACADEMY-INDUSTRY RESEARCH CORPORATION, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Eun Lee, Su Gil Lee, Gi Ju Jung, Mohammed Fouda, Fadi Kurdahi, Ahmed M. Eltawil
  • Patent number: 11681577
    Abstract: Disclosed are various approaches for a controller that can generate and use non-stationary polar codes for encoding and decoding information. In one example, a method includes performing, by an encoder of the controller, a linear operation on at least one vector of information to be stored in a memory. The linear operation includes generating a polar encoded representation from the at least one vector of information. The linear operation also includes generating an output using at least one permutation that is based on a statistical characterization analysis of channels of the memory and a channel dependent permutation that is applied to the polar encoded representation. In some aspects, the statistical characterization analysis includes a respective reliability level of each one of the plurality of channels, and the channel dependent permutation includes an ordered permutation that orders the channels according to their respective reliability level.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: June 20, 2023
    Assignee: The Regents of the University of California
    Inventors: Marwen Zorgui, Mohammed Fouda, Ahmed M. Eltawil, Zhiying Wang, Fadi Kurdahi
  • Publication number: 20220245038
    Abstract: A stuck-at fault mitigation method for resistive random access memory (ReRAM)-based deep learning accelerators, includes: confirming a distorted output value (Y0) due to a stuck-at fault (SAF) by using a correction data set in a pre-trained deep learning network, by means of ReRAM-based deep learning accelerator hardware; updating an average (?) and a standard deviation (?) of a batch normalization (BN) layer by using the distorted output value (Y0), by means of the ReRAM-based deep learning accelerator hardware; folding the batch normalization (BN) layer in which the average (?) and the standard deviation (?) are updated into a convolution layer or a fully-connected layer, by means of the ReRAM-based deep learning accelerator hardware; and deriving a normal output value (Y1) by using the deep learning network in which the batch normalization (BN) layer is folded, by means of the ReRAM-based deep learning accelerator hardware.
    Type: Application
    Filed: January 21, 2022
    Publication date: August 4, 2022
    Applicants: UNIST Academy-Industry Research Corporation, THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Eun LEE, Su Gil LEE, Gi Ju JUNG, Mohammed FOUDA, Fadi KURDAHI, Ahmed M. ELTAWIL
  • Publication number: 20220013212
    Abstract: A system for tracking diet and nutrition includes an oral module configured to be affixed within a mouth of a user and including a set of salivary sensors responsive to a level of at least one nutrient. The system also includes a set of eating event sensors responsive to an eating event. The set of eating event sensors can be included in the oral module, or can be included in a body module configured to be affixed adjacent to a body part of the user.
    Type: Application
    Filed: November 15, 2019
    Publication date: January 13, 2022
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Peter TSENG, Mohammad AL FARUQUE, Fadi KURDAHI
  • Publication number: 20210240565
    Abstract: Disclosed are various approaches for a controller that can generate and use non-stationary polar codes for encoding and decoding information. In one example, a method includes performing, by an encoder of the controller, a linear operation on at least one vector of information to be stored in a memory. The linear operation includes generating a polar encoded representation from the at least one vector of information. The linear operation also includes generating an output using at least one permutation that is based on a statistical characterization analysis of channels of the memory and a channel dependent permutation that is applied to the polar encoded representation. In some aspects, the statistical characterization analysis includes a respective reliability level of each one of the plurality of channels, and the channel dependent permutation includes an ordered permutation that orders the channels according to their respective reliability level.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 5, 2021
    Inventors: Marwen Zorgui, Mohammed Fouda, Ahmed M. Eltawil, Zhiying Wang, Fadi Kurdahi
  • Patent number: 9218061
    Abstract: A method of audio and video synchronization may include capturing an image by each of a plurality of cameras. The images and audio may be compared with each other for synchronization.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: December 22, 2015
    Assignee: The Regents of the University of California
    Inventors: Aditi Majumder, Fadi Kurdahi, Kiarash Amiri, Magda El Zarki, Shih-Hsien Yang
  • Publication number: 20120320200
    Abstract: A method of audio and video synchronization may include capturing an image by each of a plurality of cameras. The images and audio may be compared with each other for synchronization.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 20, 2012
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, A CALIFORNIA CORPORATION
    Inventors: ADITI MAJUMDER, FADI KURDAHI, KIARASH AMIRI, MAGDA EL ZARKI, SHIH-HSIEN YANG
  • Patent number: 7089436
    Abstract: A method and arrangement for reducing power consumption in an M row×N column array of processing cells. A row mask register masks individual cells in each row for being enabled. A column mask register masks individual cells in each column for being enabled. The combination of the row mask register signal and column mask register signal enables or disables each cell of the array. Enabled cells are activated to execute an operation or function, while disabled cells a prevented from consuming dynamic power. Depending on the application and enabled cells thereby, power consumption is reduced.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: August 8, 2006
    Assignee: Morpho Technologies
    Inventors: Ming-Hau Lee, Fadi Kurdahi
  • Publication number: 20020133688
    Abstract: A system and method for programming an M×N array of cells. Each cell is reconfigurable to execute a function according to a context instruction. The context instruction defines an operation of the array. An enable register includes a row enable register and a column enable register, corresponding to the M rows and N columns. Each cell is individually and independently enabled for receiving a next context instruction, according to an enable signal provided by the enable register. Non-enabled cells execute a present context. Enabled cells receive and execute an updated context. In this way, the array of cells can be configured to execute any number of independent functions for the operation.
    Type: Application
    Filed: January 29, 2001
    Publication date: September 19, 2002
    Inventors: Ming-Hau Lee, Fadi Kurdahi
  • Publication number: 20020108063
    Abstract: A method and arrangement for reducing power consumption in an M row×N column array of processing cells. A row mask register masks individual cells in each row for being enabled. A column mask register masks individual cells in each column for being enabled. The combination of the row mask register signal and column mask register signal enables or disables each cell of the array. Enabled cells are activated to execute an operation or function, while disabled cells a prevented from consuming dynamic power. Depending on the application and enabled cells thereby, power consumption is reduced.
    Type: Application
    Filed: February 5, 2001
    Publication date: August 8, 2002
    Inventors: Ming-Hau Lee, Fadi Kurdahi