Patents by Inventor Faisal Yaqoob
Faisal Yaqoob has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230084901Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.Type: ApplicationFiled: September 20, 2022Publication date: March 16, 2023Inventors: Kwame EASON, Dengliang Yang, Pilyeon Park, Faisal Yaqoob, Joon Hong Park, Mark Kawaguchi, Ji Zhu, Ivelin Angelov, Hsiao-Eei Chang
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Patent number: 11469079Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.Type: GrantFiled: March 14, 2017Date of Patent: October 11, 2022Assignee: LAM RESEARCH CORPORATIONInventors: Kwame Eason, Dengliang Yang, Pilyeon Park, Faisal Yaqoob, Joon Hong Park, Mark Kawaguchi, Ivelin Angelov, Ji Zhu, Hsiao-Wei Chang
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Patent number: 10679868Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of NO activation of an oxide surface. Once activated, a fluorine-containing gas or vapor etches the activated surface. Etching is self-limiting as once the activated surface is removed, etching stops since the fluorine species does not spontaneously react with the un-activated oxide surface. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.Type: GrantFiled: July 21, 2016Date of Patent: June 9, 2020Assignee: LAM RESEARCH CORPORATIONInventors: Ivan L. Berry, III, Pilyeon Park, Faisal Yaqoob
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Publication number: 20190221654Abstract: Provided are methods and apparatuses for removing a polysilicon layer on a wafer, where the wafer can include a nitride layer, a low-k dielectric layer, an oxide layer, and other films. A plasma of a hydrogen-based species and a fluorine-based species is generated in a remote plasma source, and the wafer is exposed to the plasma at a relatively low temperature to limit the formation of solid byproduct. In some implementations, the wafer is maintained at a temperature below about 60° C. The polysilicon layer is removed at a very high etch rate, and the selectivity of polysilicon over the nitride layer and the oxide layer is very high. In some implementations, the wafer is supported on a wafer support having a plurality of thermal zones configured to define a plurality of different temperatures across the wafer.Type: ApplicationFiled: March 26, 2019Publication date: July 18, 2019Inventors: Dengliang Yang, Kwame Eason, Faisal Yaqoob, Joon Hong Park
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Patent number: 10283615Abstract: Provided are methods and apparatuses for removing a polysilicon layer on a wafer, where the wafer can include a nitride layer, a low-k dielectric layer, an oxide layer, and other films. A plasma of a hydrogen-based species and a fluorine-based species is generated in a remote plasma source, and the wafer is exposed to the plasma at a relatively low temperature to limit the formation of solid byproduct. In some implementations, the wafer is maintained at a temperature below about 60° C. The polysilicon layer is removed at a very high etch rate, and the selectivity of polysilicon over the nitride layer and the oxide layer is very high. In some implementations, the wafer is supported on a wafer support having a plurality of thermal zones configured to define a plurality of different temperatures across the wafer.Type: GrantFiled: November 11, 2015Date of Patent: May 7, 2019Assignee: Novellus Systems, Inc.Inventors: Dengliang Yang, Kwame Eason, Faisal Yaqoob, Joon Hong Park
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Patent number: 10192751Abstract: A method for selectively etching a silicon nitride layer on a substrate includes arranging a substrate on a substrate support of a substrate processing chamber. The substrate processing chamber includes an upper chamber region, an inductive coil arranged outside of the upper chamber region, a lower chamber region including the substrate support and a gas dispersion device. The gas dispersion device includes a plurality of holes in fluid communication with the upper chamber region and the lower chamber region. The method includes supplying an etch gas mixture to the upper chamber region and striking inductively coupled plasma in the upper chamber region by supplying power to the inductive coil. The etch gas mixture etches silicon nitride, promotes silicon dioxide passivation and promotes polysilicon passivation. The method includes selectively etching the silicon nitride layer on the substrate and extinguishing the inductively coupled plasma after a predetermined period.Type: GrantFiled: September 21, 2016Date of Patent: January 29, 2019Assignee: LAM RESEARCH CORPORATIONInventors: Dengliang Yang, Faisal Yaqoob, Pilyeon Park, Helen H. Zhu, Joon Hong Park
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Publication number: 20180269070Abstract: A substrate processing system for selectively etching a layer on a substrate includes an upper chamber region, an inductive coil arranged around the upper chamber region and a lower chamber region including a substrate support to support a substrate. A gas distribution device is arranged between the upper chamber region and the lower chamber region and includes a plate with a plurality of holes. A cooling plenum cools the gas distribution device and a purge gas plenum directs purge gas into the lower chamber. A surface to volume ratio of the holes is greater than or equal to 4. A controller selectively supplies an etch gas mixture to the upper chamber and a purge gas to the purge gas plenum and strikes plasma in the upper chamber to selectively etch a layer of the substrate relative to at least one other exposed layer of the substrate.Type: ApplicationFiled: March 14, 2017Publication date: September 20, 2018Inventors: Kwame Eason, Dengliang Yang, Pilyeon Park, Faisal Yaqoob, Joon Hong Park, Mark Kawaguchi, Ivelin Angelov, Ji Zhu, Hsiao-Wei Chang
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Publication number: 20180158692Abstract: Apparatuses for processing substrates are provided herein. Apparatuses include a plasma etch chamber having a showerhead and pedestal for holding a substrate having silicon nitride, at least one outlet for coupling to a vacuum, a solid non-functional silicon source, and a plasma generator. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. Apparatuses also include a plasma etch chamber, at least one outlet, a solid non-functional silicon source, a plasma generator, and a controller for controlling operations including instructions for causing introduction of a fluorinating gas and causing ignition of a plasma to form fluorine-containing etching species in the plasma etch chamber.Type: ApplicationFiled: January 23, 2018Publication date: June 7, 2018Inventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park
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Patent number: 9911620Abstract: Methods of selectively etching silicon nitride on a semiconductor substrate by providing silicon to the plasma to achieve high etch selectivity of silicon nitride to silicon-containing materials are provided. Methods involve providing silicon from a solid or fluidic silicon source or both. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. A silicon gas source may be flowed to the plasma during etch.Type: GrantFiled: April 1, 2015Date of Patent: March 6, 2018Assignee: Lam Research CorporationInventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park
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Publication number: 20170110335Abstract: A method for selectively etching a silicon nitride layer on a substrate includes arranging a substrate on a substrate support of a substrate processing chamber. The substrate processing chamber includes an upper chamber region, an inductive coil arranged outside of the upper chamber region, a lower chamber region including the substrate support and a gas dispersion device. The gas dispersion device includes a plurality of holes in fluid communication with the upper chamber region and the lower chamber region. The method includes supplying an etch gas mixture to the upper chamber region and striking inductively coupled plasma in the upper chamber region by supplying power to the inductive coil. The etch gas mixture etches silicon nitride, promotes silicon dioxide passivation and promotes polysilicon passivation, The method includes selectively etching the silicon nitride layer on the substrate and extinguishing the inductively coupled plasma after a predetermined period.Type: ApplicationFiled: September 21, 2016Publication date: April 20, 2017Inventors: Dengliang Yang, Faisal Yaqoob, Pilyeon Park, Helen H. Zhu, Joon Hong Park
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Publication number: 20160329221Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of NO activation of an oxide surface. Once activated, a fluorine-containing gas or vapor etches the activated surface. Etching is self-limiting as once the activated surface is removed, etching stops since the fluorine species does not spontaneously react with the un-activated oxide surface. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.Type: ApplicationFiled: July 21, 2016Publication date: November 10, 2016Inventors: Ivan L. Berry, III, Pilyeon Park, Faisal Yaqoob
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Publication number: 20160247688Abstract: Methods of selectively etching silicon nitride on a semiconductor substrate by providing silicon to the plasma to achieve high etch selectivity of silicon nitride to silicon-containing materials are provided. Methods involve providing silicon from a solid or fluidic silicon source or both. A solid silicon source may be upstream of a substrate, such as at or near a showerhead of a process chamber, or in a remote plasma generator. A silicon gas source may be flowed to the plasma during etch.Type: ApplicationFiled: April 1, 2015Publication date: August 25, 2016Inventors: Helen H. Zhu, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Ivan L. Berry, III, Ivelin A. Angelov, Joon Hong Park
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Patent number: 9425041Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of NO activation of an oxide surface. Once activated, a fluorine-containing gas or vapor etches the activated surface. Etching is self-limiting as once the activated surface is removed, etching stops since the fluorine species does not spontaneously react with the un-activated oxide surface. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.Type: GrantFiled: January 6, 2015Date of Patent: August 23, 2016Assignee: Lam Research CorporationInventors: Ivan L. Berry, III, Pilyeon Park, Faisal Yaqoob
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Publication number: 20160196969Abstract: Methods for controlled isotropic etching of layers of silicon oxide and germanium oxide with atomic scale fidelity are provided. The methods make use of NO activation of an oxide surface. Once activated, a fluorine-containing gas or vapor etches the activated surface. Etching is self-limiting as once the activated surface is removed, etching stops since the fluorine species does not spontaneously react with the un-activated oxide surface. These methods may be used in interconnect pre-clean applications, gate dielectric processing, manufacturing of memory devices, or any other applications where accurate removal of one or multiple atomic layers of material is desired.Type: ApplicationFiled: January 6, 2015Publication date: July 7, 2016Inventors: Ivan L. Berry, III, Pilyeon Park, Faisal Yaqoob
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Publication number: 20160181116Abstract: Methods of selectively etching silicon nitride are provided. Silicon nitride layers are exposed to a fluorinating gas and nitric oxide (NO), which may be formed by reacting nitrous oxide (N2O) and oxygen (O2) in a plasma. Methods also include defluorinating the substrate prior to turning off the plasma to increase etch selectivity of silicon nitride.Type: ApplicationFiled: December 18, 2014Publication date: June 23, 2016Inventors: Ivan L. Berry, III, Ivelin Angelov, Linda Marquez, Faisal Yaqoob, Pilyeon Park, Helen H. Zhu, Bayu Atmaja Thedjoisworo, Zhao Li
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Publication number: 20160064519Abstract: Provided are methods and apparatuses for removing a polysilicon layer on a wafer, where the wafer can include a nitride layer, a low-k dielectric layer, an oxide layer, and other films. A plasma of a hydrogen-based species and a fluorine-based species is generated in a remote plasma source, and the wafer is exposed to the plasma at a relatively low temperature to limit the formation of solid byproduct. In some implementations, the wafer is maintained at a temperature below about 60° C. The polysilicon layer is removed at a very high etch rate, and the selectivity of polysilicon over the nitride layer and the oxide layer is very high. In some implementations, the wafer is supported on a wafer support having a plurality of thermal zones configured to define a plurality of different temperatures across the wafer.Type: ApplicationFiled: November 11, 2015Publication date: March 3, 2016Inventors: Dengliang Yang, Kwame Eason, Faisal Yaqoob, Joon Hong Park