Patents by Inventor Faiz Dahmani

Faiz Dahmani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180040816
    Abstract: A resistive random access memory device includes a first electrode; a solid electrolyte made of metal oxide extending onto the first electrode; a second electrode able to supply mobile ions circulating in the solid electrolyte made of metal oxide to the first electrode to form a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes; an interface layer including a transition metal from groups 3, 4, 5 or 6 of the periodic table and a chalcogen element; the interface layer extending onto the solid electrolyte made of metal oxide, the second electrode extending onto the interface layer.
    Type: Application
    Filed: October 16, 2017
    Publication date: February 8, 2018
    Inventors: Gabriel MOLAS, Philippe BLAISE, Faiz DAHMANI, Elisa VIANELLO
  • Patent number: 9722177
    Abstract: A resistive random access memory device includes a first electrode made of inert material; a second electrode made of soluble material; a solid electrolyte including a region made of an oxide of a first metal element, referred to as first metal oxide doped by a second element, distinct from the first metal and able to form a second oxide, the second element being selected such that the band gap energy of the second oxide is strictly greater than the band gap energy of the first metal oxide, the atomic percentage of the second element within the region of the solid electrolyte being comprised between 5% and 20%.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: August 1, 2017
    Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Gabriel Molas, Philippe Blaise, Faiz Dahmani, Elisa Vianello
  • Patent number: 9431607
    Abstract: A resistive random access memory device includes a first electrode made of inert material; a second electrode made of soluble material, and a solid electrolyte, the first and second electrodes being respectively in contact with one of the faces of the electrolyte, the second electrode to supply mobile ions circulating in the solid electrolyte to the first electrode to form a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes, the solid electrolyte including a region made of a first metal oxide that is doped by a second metal, distinct from the first metal and able to form a second metal oxide, the second metal selected such that the first metal oxide doped by the second metal has a band gap energy less than or equal to that of the first metal oxide not doped by the second metal.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: August 30, 2016
    Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES
    Inventors: Gabriel Molas, Philippe Blaise, Faiz Dahmani, Rémy Gassiloud, Elisa Vianello
  • Publication number: 20150364680
    Abstract: A resistive random access memory device includes a first electrode; a solid electrolyte made of metal oxide extending onto the first electrode; a second electrode able to supply mobile ions circulating in the solid electrolyte made of metal oxide to the first electrode to form a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes; an interface layer including a transition metal from groups 3, 4, 5 or 6 of the periodic table and a chalcogen element; the interface layer extending onto the solid electrolyte made of metal oxide, the second electrode extending onto the interface layer.
    Type: Application
    Filed: June 12, 2015
    Publication date: December 17, 2015
    Inventors: Gabriel MOLAS, Philippe BLAISE, Faiz DAHMANI, Elisa VIANELLO
  • Publication number: 20150364679
    Abstract: A resistive random access memory device includes a first electrode made of inert material; a second electrode made of soluble material; a solid electrolyte including a region made of an oxide of a first metal element, referred to as first metal oxide doped by a second element, distinct from the first metal and able to form a second oxide, the second element being selected such that the band gap energy of the second oxide is strictly greater than the band gap energy of the first metal oxide, the atomic percentage of the second element within the region of the solid electrolyte being comprised between 5% and 20%.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 17, 2015
    Inventors: Gabriel MOLAS, Philippe BLAISE, Faiz DAHMANI, Elisa VIANELLO
  • Publication number: 20150280120
    Abstract: A resistive random access memory device includes a first electrode made of inert material; a second electrode made of soluble material, and a solid electrolyte, the first and second electrodes being respectively in contact with one of the faces of the electrolyte, the second electrode to supply mobile ions circulating in the solid electrolyte to the first electrode to form a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes, the solid electrolyte including a region made of a first metal oxide that is doped by a second metal, distinct from the first metal and able to form a second metal oxide, the second metal selected such that the first metal oxide doped by the second metal has a band gap energy less than or equal to that of the first metal oxide not doped by the second metal.
    Type: Application
    Filed: March 26, 2015
    Publication date: October 1, 2015
    Inventors: Gabriel MOLAS, Philippe BLAISE, Faiz DAHMANI, Rémy GASSILOUD, Elisa VIANELLO
  • Publication number: 20140021433
    Abstract: A microelectronic device with programmable memory is provided having at least: a first electrode (1) and a second electrode (9) having positioned between them a first layer of doped chalcogenide material (5) having an atomic concentration n1 of a doping metallic element d1. The device further has a second layer of doped chalcogenide material (8) positioned between the first electrode (1) and the second electrode (9), the second layer of doped chalcogenide material (8) having an atomic concentration n2 of a doping metallic element d2, the atomic concentration n2 being strictly less than the atomic concentration n1.
    Type: Application
    Filed: July 8, 2013
    Publication date: January 23, 2014
    Inventor: Faiz Dahmani
  • Patent number: 8597975
    Abstract: A method is provided for fabricating a microelectronic device with programmable memory that includes: i) depositing an intermediate layer of a material having a chalcogenide on a first electrode; ii) irradiating the intermediate layer of step i with ultraviolet radiation; iii) depositing an ionizable metallic layer on the intermediate layer obtained in step ii; iv) diffusing the metal ions originating from the ionizable metallic layer of step iii into the intermediate layer to form a chalcogenide material containing metal ions; and v) depositing a second electrode on the layer of chalcogenide material containing metal ions obtained in step iv to form the microelectronic device.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: December 3, 2013
    Assignee: Altis Semiconductor
    Inventor: Faiz Dahmani
  • Publication number: 20130270505
    Abstract: A microelectronic device with programmable memory (10) includes a first metallic electrode (2) deposited at least in part on a substrate (1), a doped chalcogenide layer (3) deposited on the first metallic electrode (2) and a second metallic electrode (4) deposited on the doped chalcogenide layer (3). The device further has an intermediate layer (5) positioned between the first metallic electrode (2) and the doped chalcogenide layer (3), the intermediate layer (5) being a layer of a metallic element having the following properties a and b: a) a coefficient of thermal conductivity greater than or equal to 60 W/m·K; and b) mechanical stress less than or equal to ?1600 MPa.
    Type: Application
    Filed: October 8, 2012
    Publication date: October 17, 2013
    Inventor: FAIZ DAHMANI
  • Patent number: 8501525
    Abstract: A method of fabricating a programmable memory microelectronic device includes depositing onto a first electrode an intermediate layer of a material having a chalcogenide; depositing an ionizable metallic layer on the intermediate layer; irradiating with ultraviolet radiation the ionizable metallic layer so that metallic ions from the ionizable metallic layer diffuse into the intermediate layer to form a chalcogenide material containing metallic ions, and depositing a second electrode on the layer of chalcogenide material containing metallic ions obtained in the prior step. The second and third steps are repeated at least n times, where n is an integer greater than or equal to 1. The ionizable metallic layer deposited during the second step has a sufficiently small thickness that the metallic ions may be diffused totally during the irradiation (third) step.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: August 6, 2013
    Assignee: Altis Semiconductor
    Inventor: Faiz Dahmani
  • Publication number: 20130126813
    Abstract: A method is provided for fabricating a microelectronic device with programmable memory that includes: i) depositing an intermediate layer of a material having a chalcogenide on a first electrode; ii) irradiating the intermediate layer of step i with ultraviolet radiation; iii) depositing an ionizable metallic layer on the intermediate layer obtained in step ii; iv) diffusing the metal ions originating from the ionizable metallic layer of step iii into the intermediate layer to form a chalcogenide material containing metal ions; and v) depositing a second electrode on the layer of chalcogenide material containing metal ions obtained in step iv to form the microelectronic device.
    Type: Application
    Filed: July 2, 2012
    Publication date: May 23, 2013
    Inventor: Faiz Dahmani
  • Patent number: 8268664
    Abstract: Methods of manufacturing a semiconductor device, a method of manufacturing a memory cell, a semiconductor device, a semiconductor processing device, and a memory cell, are provided. In one embodiment a method of manufacturing a semiconductor device is provided including forming a metal doped chalcogenide layer using light irradiation at least partially during provision of the metal.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: September 18, 2012
    Assignees: Altis Semiconductor, Adesto Technology Corporation
    Inventor: Faiz Dahmani
  • Publication number: 20120073957
    Abstract: A deposition process includes sputtering of a layer of a material having a chalcogenide compound, the chalcogenide being composed of at least one chalcogen on and at least one electropositive element, in order to increase or to decrease the atomic proportion (%) of the chalcogen ion with respect to the atomic proportion (%) of the electropositive element.
    Type: Application
    Filed: September 27, 2011
    Publication date: March 29, 2012
    Inventor: Faiz Dahmani
  • Publication number: 20110297910
    Abstract: A method of fabricating a programmable memory microelectronic device includes depositing onto a first electrode an intermediate layer of a material having a chalcogenide; depositing an ionizable metallic layer on the intermediate layer; irradiating with ultraviolet radiation the ionizable metallic layer so that metallic ions from the ionizable metallic layer diffuse into the intermediate layer to form a chalcogenide material containing metallic ions, and depositing a second electrode on the layer of chalcogenide material containing metallic ions obtained in the prior step. The second and third steps are repeated at least n times, where n is an integer greater than or equal to 1. The ionizable metallic layer deposited during the second step has a sufficiently small thickness that the metallic ions may be diffused totally during the irradiation (third) step.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Inventor: Faiz Dahmani
  • Patent number: 7682841
    Abstract: A method for manufacturing an integrated circuit having a magnetic tunnel junction device is disclosed. The method includes depositing a bottom pinning structure above the bottom conductive structure. A first ferromagnetic structure is deposited above the bottom pinning structure in a chamber. A tunnel barrier structure is deposited above the first ferromagnetic layer structure in the chamber, and a second ferromagnetic structure is deposited above the tunnel barrier structure of the magnetic tunnel junction device in another chamber.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: March 23, 2010
    Assignees: Qimonda AG, Altis Semiconductor, SNC.
    Inventors: Faiz Dahmani, Gill Yong Lee
  • Publication number: 20090103351
    Abstract: According to one embodiment of the present invention, an integrated circuit includes at least one memory device including: a reactive electrode layer, an inert electrode layer, and a solid electrolyte layer being disposed between the reactive electrode layer and the inert electrode layer; at least one interface layer being disposed between the solid electrolyte layer and the reactive electrode layer and/or between the solid electrolyte layer and the inert electrode layer. The material parameters of the at least one interface layer are chosen such that a crystallization of the solid electrolyte layer is at least partially suppressed.
    Type: Application
    Filed: October 23, 2007
    Publication date: April 23, 2009
    Inventors: Cay-Uwe Pinnow, Wolfgang Raberg, Faiz Dahmani
  • Publication number: 20080273375
    Abstract: An integrated circuit having a magnetic device is disclosed. In one embodiment, the integrated circuit includes a reference structure having a first blocking temperature. A storage structure is provided made of a ferromagnetic material. An antiferromagnetic structure is provided having a second blocking temperature lower than the first blocking temperature.
    Type: Application
    Filed: May 2, 2007
    Publication date: November 6, 2008
    Inventors: Faiz Dahmani, Chanro Park, Rainer Leuschner
  • Publication number: 20080274567
    Abstract: A method for manufacturing an integrated circuit having a magnetic tunnel junction device is disclosed. The method includes depositing a bottom pinning structure above the bottom conductive structure. A first ferromagnetic structure is deposited above the bottom pinning structure in a chamber. A tunnel barrier structure is deposited above the first ferromagnetic layer structure in the chamber, and a second ferromagnetic structure is deposited above the tunnel barrier structure of the magnetic tunnel junction device in another chamber.
    Type: Application
    Filed: May 2, 2007
    Publication date: November 6, 2008
    Inventors: Faiz Dahmani, Gill Yong Lee
  • Publication number: 20080272448
    Abstract: An integrated circuit having a magnetic tunnel junction device is disclosed. In one embodiment, the device includes: a spin transfer torque magnetization reversal structure including a first ferromagnetic structure, a second ferromagnetic structure, and a tunnel barrier structure between the first ferromagnetic structure and the second ferromagnetic structure.
    Type: Application
    Filed: May 2, 2007
    Publication date: November 6, 2008
    Inventor: Faiz Dahmani
  • Publication number: 20080217670
    Abstract: Methods of manufacturing a semiconductor device, a method of manufacturing a memory cell, a semiconductor device, a semiconductor processing device, and a memory cell, are provided. In one embodiment a method of manufacturing a semiconductor device is provided including forming a metal doped chalcogenide layer using light irradiation at least partially during provision of the metal.
    Type: Application
    Filed: March 5, 2007
    Publication date: September 11, 2008
    Inventor: Faiz Dahmani