Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.

Abstract: Battery life extending devices include a voltage boosting circuit that generates a boosted voltage from an insufficiently high battery output voltage. A voltage boosting circuit can employ voltage bypass to output the battery voltage when the battery outputs a sufficiently high voltage for the operation of a battery powered device. A voltage boosting circuit can reduce output voltage in response to reduced input voltage from the battery.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.

Abstract: A hybrid memory system provides rapid, persistent byte-addressable and block-addressable memory access to a host computer system by providing direct access to a both a volatile byte-addressable memory and a volatile block-addressable memory via the same parallel memory interface. The hybrid memory system also has at least a non-volatile block-addressable memory that allows the system to persist data even through a power-loss state. The hybrid memory system can copy and move data between any of the memories using local memory controllers to free up host system resources for other tasks.

Abstract: A battery sleeve for extending the operational life of one or more batteries, the battery sleeve comprising a positive conductive electrode configured such that when the battery sleeve is coupled to at least one battery, the positive conductive electrode of the sleeve serves as the new positive terminal of the at least one battery.

Abstract: A battery sleeve for extending the operational life of one or more batteries, the battery sleeve comprising a positive conductive electrode configured such that when the battery sleeve is coupled to at least one battery, the positive conductive electrode of the sleeve serves as the new positive terminal of the at least one battery.

Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.

Abstract: Methods for extending the life of a battery output regulated voltages from output terminals configured to interface with input terminals of battery powered devices. A method includes receiving a battery electrical power output from the battery. The voltage output by the battery decreases from a battery first output voltage to a battery second output voltage during use of the battery. The electrical power output is used to drive a converter that outputs a converter electrical power having a converter output voltage greater than the battery second output voltage. The converter electrical power is output from output terminals configured to interface with input terminals of a battery powered device. The converter is configured and supported relative to the battery to interface with one or more output terminals of the battery.

Abstract: A battery sleeve for extending the operational life of one or more batteries, the battery sleeve comprising a positive conductive electrode configured such that when the battery sleeve is coupled to at least one battery, the positive conductive electrode of the sleeve serves as the new positive terminal of the at least one battery.

Abstract: A flash memory device is disclosed in which includes a plurality of flash memory transistors disposed within a doped well. The transistors are coupled at respective sources to an array ground node via a plurality of array ground lines. A plurality of switching devices distributed throughout the doped well switchingly couple the array ground lines to the doped well to reduce an elevated voltage otherwise present on the array ground lines when the array ground lines are heavily loaded.

Abstract: A flash memory device is disclosed in which includes a plurality of flash memory transistors disposed within a doped well. The transistors are coupled at respective sources to an array ground node via a plurality of array ground lines. A plurality of switching devices distributed throughout the doped well switchingly couple the array ground lines to the doped well to reduce an elevated voltage otherwise present on the array ground lines when the array ground lines are heavily loaded.

Abstract: A flash memory device is disclosed in which includes a plurality of flash memory transistors disposed within a doped well. The transistors are coupled at respective sources to an array ground node via a plurality of array ground lines. A plurality of switching devices distributed throughout the doped well switchingly couple the array ground lines to the doped well to reduce an elevated voltage otherwise present on the array ground lines when the array ground lines are heavily loaded.

Abstract: A flash memory device is disclosed in which includes a plurality of flash memory transistors disposed within a doped well. The transistors are coupled at respective sources to an array ground node via a plurality of array ground lines. A plurality of switching devices distributed throughout the doped well switchingly couple the array ground lines to the doped well to reduce an elevated voltage otherwise present on the array ground lines when the array ground lines are heavily loaded.