Abstract: An energy storage device and method based on carbon dioxide gas-liquid phase change.

Abstract: A method includes forming a transistor over a front side of a substrate, in which the transistor comprises a channel region, a gate region over the channel region, and source/drain regions on opposite sides of the gate region; forming a front-side interconnect structure over the transistor, wherein the front-side interconnect structure includes a dielectric layer and conductive features; and bonding the front-side interconnect structure to a carrier substrate via a bonding layer, in which the bonding layer is between the front-side interconnect structure and the carrier substrate, and the bonding layer has a higher thermal conductivity than the dielectric layer of the front-side interconnect structure.

Abstract: Systems and methods of the present disclosure are directed to a computing system. The computing system can obtain a message vector and video data comprising a plurality of video frames. The computing system can process the input video with a transformation portion of a machine-learned watermark encoding model to obtain a three-dimensional feature encoding of the input video. The computing system can process the three-dimensional feature encoding of the input video and the message vector with an embedding portion of the machine-learned watermark encoding model to obtain spatial-temporal watermark encoding data descriptive of the message vector. The computing system can generate encoded video data comprising a plurality of encoded video frames, wherein at least one of the plurality of encoded video frames includes the spatial-temporal watermark encoding data.

Abstract: A method is provided that includes depositing a catalyst layer along a surface of the opening and performing a selectivity enhancement process. The selectivity enhancement process alters a deposition rate of a metal component on at least one region of the catalyst layer. The metal component is deposited on the catalyst layer. Exemplary selectivity enhancement processes include a self-assembled monolayer (SAM), introducing an accelerator, and/or introducing a suppressor.

Abstract: A method includes putting a first package component into contact with a second package component. The first package component comprises a first dielectric layer including a first dielectric material, and the first dielectric material is a silicon-oxide-based dielectric material. The second package component includes a second dielectric layer including a second dielectric material different from the first dielectric material. The second dielectric material comprises silicon and an element selected from the group consisting of carbon, nitrogen, and combinations thereof. An annealing process is performed to bond the first dielectric layer to the second dielectric layer.

Abstract: Example embodiments allow for training of encoders (e.g., artificial neural networks (ANNs)) to facilitate dithering of images that have been subject to quantization in order to reduce the number of colors and/or size of the images. Such a trained encoder generates a dithering image from an input quantized image that can be combined, by addition or by some other process, with the quantized image to result in a dithered output image that exhibits reduced banding or is otherwise aesthetically improved relative to the un-dithered quantized image. The use of a trained encoder to facilitate dithering of quantized images allows the dithering to be performed in a known period of time using a known amount of memory, in contrast to alternative iterative dithering methods. Additionally, the trained encoder can be differentiable, allowing it to be part of a deep learning image processing pipeline or other machine learning pipeline.

Abstract: An energy storage apparatus and method based on carbon dioxide gas-liquid phase change. The energy storage apparatus comprises a gas storage reservoir; a liquid storage tank; an energy storage assembly, provided between the gas storage reservoir and the liquid storage tank, wherein the energy storage assembly comprises a condenser and at least two compression energy storage parts, the compression energy storage parts each comprise a compressor and an energy storage heat exchanger; an energy release assembly, provided between the gas storage reservoir and the liquid storage tank, wherein the energy release assembly comprises an evaporator, an energy release cooler, and at least one expansion energy release part, the expansion energy release part comprises an expander and an energy release heat exchanger; and a heat exchange assembly, comprising a cool storage tank, a heat storage tank, and a heat recovery heat exchanger.

Abstract: An information writing method is applied to an non-volatile dual in-line memory module (NVDIMM), the NVDIMM includes an NVDIMM controller and a non-volatile memory (NVM), and the method includes receiving, by the NVDIMM controller, a sanitize command from a host, where the sanitize command is used to instruct the NVDIMM controller to sanitize data in the NVM using a first write pattern, and the first write pattern is one of at least two patterns of writing information into the NVM, and writing, by the NVDIMM controller, information into the NVM according to the sanitize command.

Abstract: A method includes training a first model to measure the banding artefacts, training a second model to deband the image, and generating a debanded image for the image using the second model. Training the first model can include selecting a first set of first training images, generating a banding edge map for a first training image, where the map includes weights that emphasize banding edges and de-emphasize true edges in the first training image, and using the map and a luminance plane of the first training image as input to the first model. Training the second model can include selecting a second set of second training images, generating a debanded training image for a second training image, generating a banding score for the debanded training image using the first model, and using the banding score in a loss function used in training the second model.

Abstract: A semiconductor structure including a first die, a second die stacked on the first die, a smoothing layer disposed on the first die and a filling material layer disposed on the smoothing layer. The second die has a dielectric portion and a semiconductor material portion disposed on the dielectric portion. The smoothing layer includes a first dielectric layer and a second dielectric layer, and the second dielectric layer is disposed on the first dielectric layer. The dielectric portion is surrounded by the smoothing layer, and the semiconductor material portion is surrounded by the filling material layer. A material of the first dielectric layer is different from a material of the second dielectric layer and a material of the filling material layer.

Abstract: A master node (MN) that determines a manner of a protocol data unit (PDU) session to be served, wherein the manner of the PDU session includes a split PDU session between the MN and a secondary node (SN) or a whole PDU session served by the MN, generates a request message to be transmitted to the SN to setup PDU session resources on the SN based on the manner of the PDU session is to be served and indicates, to the SN, the manner of the PDU session to be served. A SN that receives, from a MN, a request message to setup PDU session resources, determines a manner of the PDU session to be served, and sets up the PDU session resources on the SN, based on at least the manner of the PDU session to be served.

Abstract: A chemical dispensing system is capable of simultaneously supplying a semiconductor processing chemical for production and testing through the use of independent chemical supply lines, which reduces production downtime of an associated semiconductor process, increases throughput and capability of the semiconductor process, and/or the like. Moreover, the capability to simultaneously supply the semiconductor processing chemical for production and testing allows for an increased quantity of semiconductor processing chemical batches to be tested with minimal impact to production, which increases quality control over the semiconductor processing chemical. In addition, the independent chemical supply lines may be used to supply the semiconductor processing chemical to production while independently filtering semiconductor processing chemical directly from a storage drum through a filtration loop.

Abstract: A bioculture meat device includes a culture medium conditioning tank (1), a cell proliferation tank (2), a muscle separating tank (3), a compression forming device (4), and a control system. The control system is divided into a culture medium regulation and control system (51) for controlling the culture medium conditioning tank (1), a cell proliferation control system (52) for controlling the cell proliferation tank (2), and a muscle collecting and shaping control system (53) for controlling the muscle separating tank (3) and the compression forming device (4). Different from traditional manual production, the device controls a culture environment through automatic equipment, realizes automatic integration from culturing to processing a finished product, improves the production capacity, and reduces the cost.

Abstract: A method includes forming a conductive pad over an interconnect structure of a wafer, forming a capping layer over the conductive pad, forming a dielectric layer covering the capping layer, and etching the dielectric layer to form an opening in the dielectric layer. The capping layer is exposed to the opening. A wet-cleaning process is then performed on the wafer. During the wet-cleaning process, a top surface of the capping layer is exposed to a chemical solution used for performing the wet-cleaning process. The method further includes depositing a conductive diffusion barrier extending into the opening, and depositing a conductive material over the conductive diffusion barrier.

Abstract: A semiconductor device includes a through-substrate via extending from a frontside to a backside of a semiconductor substrate. The through-substrate via includes a concave or a convex portion adjacent to the backside of the semiconductor substrate. An isolation film is formed on the backside of the semiconductor substrate. A conductive layer includes a first portion formed on the concave or convex portion of the through substrate via and a second portion formed on the isolation film. A passivation layer partially covers the conductive layer.

Abstract: A semiconductor device includes a through-substrate via extending from a frontside to a backside of a semiconductor substrate. The through-substrate via includes a concave or a convex portion adjacent to the backside of the semiconductor substrate. An isolation film is formed on the backside of the semiconductor substrate. A conductive layer includes a first portion formed on the concave or convex portion of the through substrate via and a second portion formed on the isolation film. A passivation layer partially covers the conductive layer.

Abstract: The present invention relates a remote sensing system, or particularly a satellite-formation-based remote sensing system, wherein comprising: a master satellite provided with an SAR system as a payload thereof, a first concomitant satellite, and a second concomitant satellite, wherein the first concomitant satellite and the second concomitant satellite fly around the master satellite, and the master satellite is located on major axes of motion trajectories of the first concomitant satellite and the second concomitant satellite, so as to define a first spatial baseline and a second spatial baseline that have an identical cross-track baseline component. The present invention enables high-precision, wide-range, three-dimensional imaging based on the satellite-formation, while acquires spatiotemporal features of variation of a ground region according to the synchronization in terms of time, frequency, and space.

Abstract: A method of fabricating a semiconductor chip includes the following steps. A bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. A semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. The first interconnect structure layer is located. A second bonding layer is formed on the first interconnect structure layer. The second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. A bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. A second interconnect structure layer is formed on the semiconductor component layer. A conductor terminal is formed on the second interconnect structure layer.

Abstract: A chemical dispensing system is capable of simultaneously supplying a semiconductor processing chemical for production and testing through the use of independent chemical supply lines, which reduces production downtime of an associated semiconductor process, increases throughput and capability of the semiconductor process, and/or the like. Moreover, the capability to simultaneously supply the semiconductor processing chemical for production and testing allows for an increased quantity of semiconductor processing chemical batches to be tested with minimal impact to production, which increases quality control over the semiconductor processing chemical. In addition, the independent chemical supply lines may be used to supply the semiconductor processing chemical to production while independently filtering semiconductor processing chemical directly from a storage drum through a filtration loop.