Abstract: A power converter and control circuit are provided. The control circuit has a power controller for turning on the power switch to maintain a desired output voltage and mode selection switch provides a mode selection signal. Depending on the magnitude of an input voltage of the power converter, in which the mode selection circuit compares the input voltage of the power converter with a reference voltage, a modulation controller is configured to turn on a modulation switch to activate the capacitor according to the mode selection signal.

Abstract: A power converter includes a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter.

Abstract: A power converter and control circuit are provided. The control circuit has a power controller for turning on the power switch to maintain a desired output voltage and mode selection switch provides a mode selection signal. Depending on the magnitude of an input voltage of the power converter, in which the mode selection circuit compares the input voltage of the power converter with a reference voltage, a modulation controller is configured to turn on a modulation switch to activate the capacitor according to the mode selection signal.

Abstract: A method for controlling a power converter includes turning on a power switch to maintain a desired output voltage, wherein the power switch is coupled to a primary winding to control a primary current flow and the output voltage is provided by a secondary winding. The method also includes adding a capacitance in parallel to the power switch at a time determined by a magnitude of an input voltage to the power converter. Here, the timing of adding the capacitance depends on the operation mode of the power controller. In a low input voltage mode, the capacitance is added in a demagnetization-time during which the secondary winding discharges. In a high input voltage mode, the capacitance is added in a discontinuous time.

Abstract: A power converter includes a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter.

Abstract: A power converter includes a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter.

Abstract: A method for controlling a power converter includes turning on a power switch to maintain a desired output voltage, wherein the power switch is coupled to a primary winding to control a primary current flow and the output voltage is provided by a secondary winding. The method also includes adding a capacitance in parallel to the power switch at a time determined by a magnitude of an input voltage to the power converter. Here, the timing of adding the capacitance depends on the operation mode of the power controller. In a low input voltage mode, the capacitance is added in a demagnetization-time during which the secondary winding discharges. In a high input voltage mode, the capacitance is added in a discontinuous time.

Abstract: A power converter includes a power switch controlling current flow in the power converter and a variable capacitance coupled in parallel to the power switch. The variable capacitance is configured to add a frequency jitter to the power converter.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: Variable feedback architecture and control techniques for variable gain amplifiers (VGAs) concurrently maintain, across a wide range of VGA gain settings, minimal input and output impedance variations, a low noise figure, low rates of change in noise figure, high signal-to-noise ratio (SNR), high quality of service (QoS), low distortion, high and relatively constant output third order intercept point (i.e., IP3 or TOI). Variable feedback counteracts impedance variations caused by gain variations. Compared to conventional high performance VGAs, noise figure is lower (e.g. 3 dB lower at maximum gain and 12 dB lower at minimum gain) and relatively constant, IP3 is higher and relatively constant, small signal third order intermodulation signal (IM3) tone slope is relatively constant and input and output impedances are relatively constant. As gain decreases, the noise figure advantage is nearly dB per dB compared to conventional high performance VGAs.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: Variable feedback architecture and control techniques for variable gain amplifiers (VGAs) concurrently maintain, across a wide range of VGA gain settings, minimal input and output impedance variations, a low noise figure, low rates of change in noise figure, high signal-to-noise ratio (SNR), high quality of service (QoS), low distortion, high and relatively constant output third order intercept point (i.e., IP3 or TOI). Variable feedback counteracts impedance variations caused by gain variations. Compared to conventional high performance VGAs, noise figure is lower (e.g. 3 dB lower at maximum gain and 12 dB lower at minimum gain) and relatively constant, IP3 is higher and relatively constant, small signal third order intermodulation signal (IM3) tone slope is relatively constant and input and output impedances are relatively constant. As gain decreases, the noise figure advantage is nearly dB per dB compared to conventional high performance VGAs.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: A buck DC-to-DC converter having a novel output protection mechanism, comprising: a buck converter circuit, having a line input end, a DC output end, a first feedback end, and a second feedback end; a voltage divider, having an input terminal and an output terminal, the input terminal being coupled to the DC output end of the buck converter circuit, and the output terminal coupled to the first feedback end of the buck converter circuit for providing a first feedback voltage; and an output current sensing resistor, having one end coupled to the DC output end of the buck converter circuit, and another end coupled to the second feedback end of the buck converter circuit for providing a second feedback voltage; wherein the buck converter circuit uses the first feedback voltage and the second feedback voltage to generate a protection signal.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: Hybrid-coding, multi-cell architecture and operating techniques for step devices provide advantages over binary-coded and thermometer-coded step devices by minimizing or avoiding glitches common in the transient response of binary-coded step devices and by minimizing or avoiding significant increases or degradation in one or more of area, package dimensions, pin counts, power consumption, insertion loss and parasitic capacitance common to thermometer-coded step devices having equivalent range and resolution.

Abstract: An impedance-matched amplifier utilizing a feed-forward linearization technique involving multiple negative feedbacks and distortion compensation without active tail current sources reduces noise, distortion, power consumption and heat dissipation requirements and increases linearity, dynamic range, signal-to-noise-ratio, sensitivity and quality of service. Some differential amplifier embodiments of the invention consume less than 2 mA at 5 Volts or 10 mW power consumption per 1 mW in peak and sustained output IP3 performance above 40 dBm. In contrast, for an input signal frequency of 200 MHz, a 16 dB gain state-of-the-art differential amplifier consumes 100 mA at 5 Volts with a peak output IP3 of 36 dBm while an implementation of a 16 dB gain differential amplifier embodying the invention consumes 77.7 mA at 5 Volts with a peak output IP3 of 46 dBm and sustained at or above 40 dBm over a wide frequency range.

Abstract: An impedance-matched amplifier utilizing a feed-forward linearization technique involving multiple negative feedbacks and distortion compensation without active tail current sources reduces noise, distortion, power consumption and heat dissipation requirements and increases linearity, dynamic range, signal-to-noise-ratio, sensitivity and quality of service. Some differential amplifier embodiments of the invention consume less than 2 mA at 5 Volts or 10 mW power consumption per 1 mW in peak and sustained output IP3 performance above 40 dBm. In contrast, for an input signal frequency of 200 MHz, a 16 dB gain state-of-the-art differential amplifier consumes 100 mA at 5 Volts with a peak output IP3 of 36 dBm while an implementation of a 16 dB gain differential amplifier embodying the invention consumes 77.7 mA at 5 Volts with a peak output IP3 of 46 dBm and sustained at or above 40 dBm over a wide frequency range.

Abstract: A buck DC-to-DC converter having a novel output protection mechanism, comprising: a buck converter circuit, having a line input end, a DC output end, a first feedback end, and a second feedback end; a voltage divider, having an input terminal and an output terminal, the input terminal being coupled to the DC output end of the buck converter circuit, and the output terminal coupled to the first feedback end of the buck converter circuit for providing a first feedback voltage; and an output current sensing resistor, having one end coupled to the DC output end of the buck converter circuit, and another end coupled to the second feedback end of the buck converter circuit for providing a second feedback voltage; wherein the buck converter circuit uses the first feedback voltage and the second feedback voltage to generate a protection signal.