Abstract: Provided are an ultrasonic fingerprint identification circuit, a driving method thereof, and a display device. The ultrasonic fingerprint identification circuit comprises fingerprint identification units each including an ultrasonic fingerprint identification sensor connected to a first node; a control module connected to a composite signal line, a first control signal line and the first node and configured to provide a reset potential to the first node and to provide a pull-up potential to the first node in response to a first level provided by the composite signal line; a reading module connected to a second control signal line, the first node and a reading signal line, and configured to read a detection signal of the first node. The first control signal line connected to one fingerprint identification unit is reused as the second control signal line connected to another fingerprint identification unit.

Abstract: A set of nosepieces are configured to attach to a rivet setting tool. The set of nosepieces comprises a first nosepiece with a longitudinal bore having a first diameter and an O-ring having a first color, and a second nosepiece with a longitudinal bore having a second diameter that is different than the first diameter and an O-ring having a second color that is different than the first color.

Abstract: A method is provided for fabricating a semiconductor device. The method includes providing a base substrate including a dummy gate electrode and an interlayer dielectric layer covering a sidewall of the dummy gate electrode. The method also includes forming a sacrificial layer covering a top surface of the interlayer dielectric layer by using a selective atomic layer deposition process, wherein the sacrificial layer exposes a top surface of the dummy gate electrode. In addition, the method includes forming an opening by using the sacrificial layer as an etch mask to remove the dummy gate electrode, and forming a metal gate electrode on the sacrificial layer and in the opening. Further, the method includes planarizing the metal gate electrode and the sacrificial layer until a top surface of the metal gate electrode is leveled with the top surface of the interlayer dielectric layer.

Abstract: Embodiments of the present disclosure provide a method and device for collecting location information. The method includes: sending a location subscription instruction to a user equipment (UE) by using a mobile communication network, where the location subscription instruction includes: instructing the UE to measure a cell detected by the UE; receiving instruction response information reported by the UE, where the instruction response information includes an identity (ID) of the UE, an ID of the cell detected by the UE, and signal strength information of the cell detected by the UE; and acquiring location information of the UE according to the received instruction response information.

Abstract: Embodiments of the present disclosure provide a method and device for collecting location information. The method includes: sending a location subscription instruction to a user equipment (UE) by using a mobile communication network, where the location subscription instruction includes: instructing the UE to measure a cell detected by the UE; receiving instruction response information reported by the UE, where the instruction response information includes an identity (ID) of the UE, an ID of the cell detected by the UE, and signal strength information of the cell detected by the UE; and acquiring location information of the UE according to the received instruction response information.

Abstract: Embodiments of the present disclosure provide a method and device for collecting location information. The method includes: sending a location subscription instruction to a user equipment (UE) by using a mobile communication network, where the location subscription instruction includes: instructing the UE to measure a cell detected by the UE; receiving instruction response information reported by the UE, where the instruction response information includes an identity (ID) of the UE, an ID of the cell detected by the UE, and signal strength information of the cell detected by the UE; and acquiring location information of the UE according to the received instruction response information.

Abstract: Embodiments of the present disclosure provide a method and device for collecting location information. The method includes: sending a location subscription instruction to a user equipment (UE) by using a mobile communication network, where the location subscription instruction includes: instructing the UE to measure a cell detected by the UE; receiving instruction response information reported by the UE, where the instruction response information includes an identity (ID) of the UE, an ID of the cell detected by the UE, and signal strength information of the cell detected by the UE; and acquiring location information of the UE according to the received instruction response information.

Abstract: A method is provided for fabricating a semiconductor device. The method includes providing a base substrate including a dummy gate electrode and an interlayer dielectric layer covering a sidewall of the dummy gate electrode. The method also includes forming a sacrificial layer covering a top surface of the interlayer dielectric layer by using a selective atomic layer deposition process, wherein the sacrificial layer exposes a top surface of the dummy gate electrode. In addition, the method includes forming an opening by using the sacrificial layer as an etch mask to remove the dummy gate electrode, and forming a metal gate electrode on the sacrificial layer and in the opening. Further, the method includes planarizing the metal gate electrode and the sacrificial layer until a top surface of the metal gate electrode is leveled with the top surface of the interlayer dielectric layer.

Abstract: A wafer process for molded chip scale package (MCSP) comprises: depositing metal bumps on bonding pads of chips on a wafer; forming a first packaging layer at a front surface of the wafer to cover the metal bumps; forming an un-covered ring at an edge of the wafer to expose two ends of each scribe line of a plurality of scribe lines; thinning the first packaging layer to expose metal bumps; forming cutting grooves; grinding a back surface of the wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer at a bottom surface of the wafer in the recessed space; cutting off an edge portion of the wafer; flipping and mounting the wafer on a substrate; depositing a metal layer covering the metal seed layer; removing the substrate from the wafer; and separating individual chips from the wafer by cutting through the first packaging layer, the wafer, the metal seed layers and the metal layers along the scribe lines.

Abstract: Embodiments of the present disclosure provide a method and device for collecting location information. The method includes: sending a location subscription instruction to a user equipment (UE) by using a mobile communication network, where the location subscription instruction includes: instructing the UE to measure a cell detected by the UE; receiving instruction response information reported by the UE, where the instruction response information includes an identity (ID) of the UE, an ID of the cell detected by the UE, and signal strength information of the cell detected by the UE; and acquiring location information of the UE according to the received instruction response information.

Abstract: A wafer process for molded chip scale package (MCSP) comprises: depositing metal bumps on bonding pads of chips on a wafer; forming a first packaging layer at a front surface of the wafer to cover the metal bumps; forming an un-covered ring at an edge of the wafer to expose two ends of each scribe line of a plurality of scribe lines; thinning the first packaging layer to expose metal bumps; forming cutting grooves; grinding a back surface of the wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer at a bottom surface of the wafer in the recessed space; cutting off an edge portion of the wafer; flipping and mounting the wafer on a substrate; depositing a metal layer covering the metal seed layer; removing the substrate from the wafer; and separating individual chips from the wafer by cutting through the first packaging layer, the wafer, the metal seed layers and the metal layers along the scribe lines.

Abstract: A wafer process for MCSP comprises: depositing a metal bump on bonding pads of chips; forming a first packaging layer at front surface of wafer covering metal bumps while forming an un-covered ring at the edge of wafer to expose the ends of each scribe line located between two adjacent chips; thinning first packaging layer to expose metal bumps; grinding back surface of wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer and a thick metal layer at bottom surface of wafer in recessed space in a sequence; cutting off the edge portion of wafer; and separating individual chips from wafer by cutting through first packaging layer, the wafer and the metal seed and metal layers along the scribe line.

Abstract: A wafer process for MCSP comprises: depositing a metal bump on bonding pads of chips; forming a first packaging layer at front surface of wafer covering metal bumps while forming an un-covered ring at the edge of wafer to expose the ends of each scribe line located between two adjacent chips; thinning first packaging layer to expose metal bumps; grinding back surface of wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer and a thick metal layer at bottom surface of wafer in recessed space in a sequence; cutting off the edge portion of wafer; and separating individual chips from wafer by cutting through first packaging layer, the wafer and the metal seed and metal layers along the scribe line.

Abstract: This invention relates to piperazinedione compounds shown in the specification. These compounds are tyrosine kinase inhibitors and can be used to treat cancer.

Abstract: A semiconductor package is provided with an Aluminum alloy lead-frame without noble metal plated on the Aluminum base lead-frame. Aluminum alloy material with proper alloy composition and ratio for making an aluminum alloy lead-frame is provided. The aluminum alloy lead-frame is electroplated with a first metal electroplating layer, a second electroplating layer and a third electroplating layer in a sequence. The lead-frame electroplated with the first, second and third metal electroplating layers is then used in the fabrication process of a power semiconductor package including chip connecting, wire bonding, and plastic molding. After the molding process, the area of the lead-frame not covered by the molding compound is electroplated with a fourth metal electroplating layer that is not easy to be oxidized when exposing to air.

Abstract: A semiconductor package is provided with an Aluminum alloy lead-frame without noble metal plated on the Aluminum base lead-frame. Aluminum alloy material with proper alloy composition and ratio for making an aluminum alloy lead-frame is provided. The aluminum alloy lead-frame is electroplated with a first metal electroplating layer, a second electroplating layer and a third electroplating layer in a sequence. The lead-frame electroplated with the first, second and third metal electroplating layers is then used in the fabrication process of a power semiconductor package including chip connecting, wire bonding, and plastic molding. After the molding process, the area of the lead-frame not covered by the molding compound is electroplated with a fourth metal electroplating layer that is not easy to be oxidized when exposing to air.

Abstract: This invention relates to piperazinedione compounds shown in the specification. These compounds are tyrosine kinase inhibitors and can be used to treat cancer.