Patents by Inventor Ferdinand Stettner

Ferdinand Stettner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11515785
    Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first transistor comprises a drain terminal coupled to an input voltage node, a source terminal coupled to a first node, and a gate terminal coupled to a second node. The second transistor comprises a drain terminal coupled to a third node, a source terminal coupled to a fourth node, and a gate terminal coupled to a fifth node. The third transistor comprises a drain terminal coupled to a sixth node, a source terminal configured to couple to a gate terminal of a switching transistor, and a gate terminal coupled to a seventh node. The first capacitor is coupled between the first node and the third node. The second capacitor is coupled between the fourth node and the sixth node.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: November 29, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pavol Balaz, Hongcheng Xu, Ferdinand Stettner
  • Publication number: 20210328508
    Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first transistor comprises a drain terminal coupled to an input voltage node, a source terminal coupled to a first node, and a gate terminal coupled to a second node. The second transistor comprises a drain terminal coupled to a third node, a source terminal coupled to a fourth node, and a gate terminal coupled to a fifth node. The third transistor comprises a drain terminal coupled to a sixth node, a source terminal configured to couple to a gate terminal of a switching transistor, and a gate terminal coupled to a seventh node. The first capacitor is coupled between the first node and the third node. The second capacitor is coupled between the fourth node and the sixth node.
    Type: Application
    Filed: June 29, 2021
    Publication date: October 21, 2021
    Inventors: Pavol Balaz, Hongcheng Xu, Ferdinand Stettner
  • Patent number: 11095215
    Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first transistor comprises a drain terminal coupled to an input voltage node, a source terminal coupled to a first node, and a gate terminal coupled to a second node. The second transistor comprises a drain terminal coupled to a third node, a source terminal coupled to a fourth node, and a gate terminal coupled to a fifth node. The third transistor comprises a drain terminal coupled to a sixth node, a source terminal configured to couple to a gate terminal of a switching transistor, and a gate terminal coupled to a seventh node. The first capacitor is coupled between the first node and the third node. The second capacitor is coupled between the fourth node and the sixth node.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: August 17, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Pavol Balaz, Hongcheng Xu, Ferdinand Stettner
  • Publication number: 20200169168
    Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first transistor comprises a drain terminal coupled to an input voltage node, a source terminal coupled to a first node, and a gate terminal coupled to a second node. The second transistor comprises a drain terminal coupled to a third node, a source terminal coupled to a fourth node, and a gate terminal coupled to a fifth node. The third transistor comprises a drain terminal coupled to a sixth node, a source terminal configured to couple to a gate terminal of a switching transistor, and a gate terminal coupled to a seventh node. The first capacitor is coupled between the first node and the third node. The second capacitor is coupled between the fourth node and the sixth node.
    Type: Application
    Filed: November 20, 2019
    Publication date: May 28, 2020
    Inventors: Pavol BALAZ, Hongcheng XU, Ferdinand STETTNER
  • Patent number: 8890587
    Abstract: An adaptive slope generator can include a current mirror configured to receive a multiplied current that varies as a function of an output voltage and a switching frequency of a switching current. The output voltage can characterize the switching current provided to a load coupled to an inductor. The current mirror can also be configured to receive an oscillation current. The oscillation current can have an amplitude that corresponds to the switching frequency of the switching current. The current mirror can be further configured to generate an output current substantially equivalent to the product of the oscillation current and the output voltage. The adaptive slope generator can also include a ramp generator configured to generate a compensation signal based on the output current. The compensation signal can have a sawtooth shape and a slope that varies as a function of the output voltage.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: November 18, 2014
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Ferdinand Stettner
  • Publication number: 20140218075
    Abstract: An adaptive slope generator can include a current mirror configured to receive a multiplied current that varies as a function of an output voltage and a switching frequency of a switching current. The output voltage can characterize the switching current provided to a load coupled to an inductor. The current mirror can also be configured to receive an oscillation current. The oscillation current can have an amplitude that corresponds to the switching frequency of the switching current. The current mirror can be further configured to generate an output current substantially equivalent to the product of the oscillation current and the output voltage. The adaptive slope generator can also include a ramp generator configured to generate a compensation signal based on the output current. The compensation signal can have a sawtooth shape and a slope that varies as a function of the output voltage.
    Type: Application
    Filed: February 7, 2013
    Publication date: August 7, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: FERDINAND STETTNER
  • Patent number: 8203373
    Abstract: An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level output signal of a second voltage domain. The first level shifter comprises a storing element in the second voltage domain, an input stage coupled to the storing element for providing a signal state to be stored in the storing element and a feedback loop from an output of the storing element to the input stage for controlling the input stage in response to a transition of a high level output signal of the storing element.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: June 19, 2012
    Assignee: Texas Instrumentsdeutschland GmbH
    Inventors: Stefan Herzer, Ferdinand Stettner, Bernhard Wicht
  • Publication number: 20110285449
    Abstract: An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level output signal of a second voltage domain. The first level shifter comprises a storing element in the second voltage domain, an input stage coupled to the storing element for providing a signal state to be stored in the storing element and a feedback loop from an output of the storing element to the input stage for controlling the input stage in response to a transition of a high level output signal of the storing element.
    Type: Application
    Filed: August 4, 2011
    Publication date: November 24, 2011
    Applicant: Texas Instruments Deutschland GmbH
    Inventors: Stefan Herzer, Ferdinand Stettner, Bernhard Wicht
  • Patent number: 8013655
    Abstract: An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level output signal of a second voltage domain. The first level shifter comprises a storing element in the second voltage domain, an input stage coupled to the storing element for providing a signal state to be stored in the storing element and a feedback loop from an output of the storing element to the input stage for controlling the input stage in response to a transition of a high level output signal of the storing element.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: September 6, 2011
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Stefan Herzer, Ferdinand Stettner, Bernhard Wicht
  • Publication number: 20110037509
    Abstract: An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level output signal of a second voltage domain. The first level shifter comprises a storing element in the second voltage domain, an input stage coupled to the storing element for providing a signal state to be stored in the storing element and a feedback loop from an output of the storing element to the input stage for controlling the input stage in response to a transition of a high level output signal of the storing element.
    Type: Application
    Filed: August 12, 2010
    Publication date: February 17, 2011
    Applicant: Texas Instruments Deutschland GmbH
    Inventors: Stefan Herzer, Ferdinand Stettner, Bernhard Wicht