Abstract: An embodiment includes a modular dewar comprising a vacuum chamber, and a dewar circuit board. The dewar circuit board includes an inner portion including an electronic device positioned inside the vacuum chamber, an outer portion including electrical connectors positioned outside the vacuum chamber, and electrical traces connecting the electronic device inside the vacuum chamber to the electrical connectors outside the vacuum chamber.

Abstract: A method for designing an integrated circuit having optical inputs and outputs includes the step of selecting an integrated circuit design which includes at least one circuit cell design for processing electric signals. The circuit cell design has a predetermined number of electric inputs and electric outputs. The integrated circuit design also includes a plurality of layers of metalization for providing electric coupling. After the electronic integrated circuit design is selected, a predetermined number of optical input devices are located on the circuit cell design in a first prearranged orientation. The predetermined number of optical input devices is no greater than the predetermined number of electric inputs to the circuit cell. Also after the electronic circuit design is selected, a predetermined number of optical output devices are located on the circuit cell design in a second prearranged orientation.

Abstract: A high-performance photonic chipset for computing 1-D complex fast Fourier transform (FFT) calculations. Flip-chip integration is used to combine submicron CMOS ICs with GaAs chips containing 2-D arrays of multiple-quantum wells (MQW) diode optical receivers and transmitters on each chip in the set. Centralized free-space optical interconnection offers higher throughput rates, greater external bandwidth and reduced chip count compared to conventional electronic FFT devices using hard-wired interconnection between chips. The memory addressing used provides one-to-one interconnections for memory transfers between computational stages that are compatible with several known three-dimensional free-space optoelectronic packaging technologies and dual-port memory is used to permit simultaneous read-write access to adjacent addresses in the data banks needed by each stage.

Abstract: A method for designing an integrated circuit having optical inputs and outputs includes the step of selecting an integrated circuit design which includes at least one circuit cell design for processing electric signals. The circuit cell design has a predetermined number of electric inputs and electric outputs. The integrated circuit design also includes a plurality of layers of metalization for providing electric coupling. After the electronic integrated circuit design is selected, a predetermined number of optical input devices are located on the circuit cell design in a first prearranged orientation. The predetermined number of optical input devices is no greater than the predetermined number of electric inputs to the circuit cell. Also after the electronic circuit design is selected, a predetermined number of optical output devices are located on the circuit cell design in a second prearranged orientation.