Abstract: A back side illuminated image sensor includes a pixel formed by three doped photosensitive regions that are superposed vertically in a semiconductor substrate. Each photosensitive region is laterally framed by a respective vertical annular gate. The vertical annular gates are biased by a control circuit during an integration phase so as to generate an electrostatic potential comprising potential wells in the central portion of the volume of each doped photosensitive region and a potential barrier at each interface between two neighboring doped photosensitive regions.

Abstract: The invention relates to a device and a method (100) for determining a technical incident risk value in an infrastructure (5), said method comprising: a step of receiving (120) performance indicator values, a step of identifying (140) anomalous performance indicators, so as to identify abnormal values, and identifying performance indicators associated with these abnormal values, a step of determining (150) at-risk indicators, comprising an identification of performance indicators of the computing infrastructure that are correlated with the identified anomalous indicators, a step of creating (160) an augmented anomalies vector, comprising the identifiers of the identified anomalous indicators and the identifiers of the determined at-risk indicators, a determination step (170), comprising the comparison of the augmented anomalies vector with predetermined technical incident reference data.

Abstract: A system includes a video source device connected to a video destination device via a network. The video source device includes a network interface and an encoder coupled to the network interface. The encoder is configured to encode a first stream of rendered video frames having a first frame rate to generate a second stream of encoded video frames for transmission over the network via the network interface, wherein the second stream has a second frame rate greater than the first frame rate. As part of this encoding process, the encoder is configured to selectively encode multiple instances of at least one video frame of the first stream for inclusion in the second stream to compensate for the difference between the first frame rate and the second frame rate.

Abstract: A graphics pipeline cache reconstruction operation is implemented to reconstruct one or more graphics pipeline caches for a current client gaming session based on one or more pipeline structures. The pipeline structures each represent a graphical object rendered during a respective previous client gaming session and are used to reconstruct one or more graphics pipeline caches that include graphics pipeline cache objects related to the graphical objects of the pipeline structures. These graphics pipeline cache objects are used to initialize one or more graphics pipelines used to render the graphical objects in a gaming application for a current client gaming session.

Abstract: A sensor includes pixels supported by a substrate doped with a first conductivity type. Each pixel includes a portion of the substrate delimited by a vertical insulation structure with an image sensing assembly and a depth sensing assembly. The image sensing assembly includes a first region of the substrate more heavily doped with the first conductivity type and a first vertical transfer gate completely laterally surrounding the first region. Each of the depth sensing assemblies includes a second region of the substrate more heavily doped with the first conductivity type a second vertical transfer gate opposite a corresponding portion of the first vertical transfer gate. The second region is arranged between the second vertical transfer gate and the corresponding portion of the first vertical transfer gate.

Abstract: An image sensor includes a pixel with a photosensitive region accommodated within a semiconductor substrate and a MOS capacitive element with a conducting electrode electrically isolated by a dielectric layer. The dielectric layer forms an interface with both the photosensitive region and the semiconductor substrate, the interface of the dielectric layer including charge traps. A control circuit biases the electrode of the MOS capacitive element with a charge pumping signal designed to generate an alternation of successive inversion regimes and accumulation regimes in the photosensitive region. The charge pumping signal produces recombinations of photogenerated charges in the charge traps of the interface of the dielectric layer and the generation of a substrate current to empty recombined photogenerated charges.

Abstract: A turbine blade for a gas turbine engine has an airfoil including leading and trailing edges joined by spaced-apart pressure and suction sides to provide an exterior airfoil surface extending from a platform in a spanwise direction to a tip. The external airfoil surface is formed in substantial conformance with multiple cross-sectional profiles of the airfoil described by a set of Cartesian coordinates set forth in Table 1, the Cartesian coordinates provided by an axial coordinate scaled by a local axial chord, a circumferential coordinate scaled by a local axial chord, and a span location.

Abstract: The present techniques generally concern methods and systems for managing undesired effects in an electrical grid, which may include rapid voltage change(s) and/or flicker(s). The system includes an event detection module operatively connected to a plurality of horticultural light sources. The event detection module is configured to determine a power usage of the horticultural light sources, based on illumination conditions, detect an event affecting the illumination conditions, determine whether the event causes the undesired effects in the electrical grid, based on an evolution of the power usage of the horticultural light sources in response to the event, and send illumination instructions to the horticultural light sources to adjust the power usage of the horticultural light sources, if the event causes the undesired effects.

Abstract: The present techniques generally concern methods and systems for monitoring and managing reactive power from horticultural lighting sources in an electrical grid. The techniques provided herein include determining or predicting distortive effects produced by the horticultural lighting sources, evaluating a power factor of the horticultural light sources, and based on a target power factor, adjusting the power factor of the horticultural light sources. The techniques described herein allow for an optimization of the power factor of the horticultural lighting sources in order to reduce, mitigate or eliminate the negative effects generally associated with the operation of horticultural light sources on the electrical grid.

Abstract: A photosensitive sensor includes a pixel formed by a photosensitive region in a first semiconductor material, a read region in a second semiconductor material, and a transfer gate facing the parts of the first semiconductor material and the second semiconductor material located between the photosensitive region and the read region. The first semiconductor material and the second semiconductor material have different band gaps and are in contact with one another to form a heterojunction facing the transfer gate.

Abstract: A charge-coupled device includes an array of insulated electrodes vertically penetrating into a semiconductor substrate. The array includes rows of alternated longitudinal and transverse electrodes. Each end of a longitudinal electrode of a row is opposite and separated from a portion of an adjacent transverse electrode of that row. Electric insulation walls extend parallel to one another and to the longitudinal electrodes. The insulation walls penetrate vertically into the substrate deeper than the longitudinal electrodes. At least two adjacent rows of electrodes are arranged between each two successive insulation walls.

Abstract: A calculation system comprises a computing device having one or more instruction-controlled processing cores and a memory controller, the memory controller including a cache memory; and a memory circuit coupled to the memory controller via a data bus and an address bus, the memory circuit being adapted to have a first m-bit memory location accessible by a plurality of first addresses provided on the address bus, the calculation device being configured to select, in order to each memory operation accessing the first m-bit memory location, one address among the plurality first addresses.

Abstract: Debugging a graphics application executing on a target device. The graphics application may execute CPU instructions to generate graphics commands to graphics hardware for generation of graphics on a display. A breakpoint for the graphics application may be detected at a first time. In response to detecting the breakpoint, one or more graphics commands which were executed by the graphics hardware proximate to the first time may be displayed. Additionally, source code corresponding to CPU instructions which generated the one or more graphics commands may be displayed.

Abstract: A computer implemented method for managing horticultural lighting scenarios including the steps of receiving lighting scenarios and storing lighting scenario attributes thereof in a data storage; transmitting the lighting scenarios to a horticultural structure for deployment on at least one horticultural lighting apparatus; acquiring runtime data generated during the execution of the lighting scenarios and storing the runtime data on the data storage.

Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.

Abstract: There is provided a supplemental illumination assembly for supplementing a spectral content of an initial illumination originating from an illuminating lamp. The illuminating lamp includes a main controller. The supplemental illumination assembly includes an elongated body; a plurality of supplemental light emitters mounted on the elongated body, each supplemental light emitter being configured to emit light having an emitter spectrum in a non-visible range; and a local controller provided on the elongated body and configured to control the supplemental light emitters, the local controller being in communication with the main controller of the illuminating lamp to receive control signals therefrom.

Abstract: A system for simulating and implementing lighting scenarios for driving a horticultural light source in accordance with illumination instructions.

Abstract: There are provided techniques for controlling horticultural light illuminating a crop or plant. There is provided a method that includes tracking integral indicators and/or external information representative of a growth parameter of the crop or plant, and adjusting the horticultural light based on the integral indicators and/or external information. There is also provided a system including a recipe module, a tracking module configured to track integral indicators, and a feedback loop configured to feed ongoing integral indicators to the recipe module, and, in response thereto, alter illumination instructions, thereby adjusting the lighting scenario to be transmitted to a horticultural lighting apparatus.

Abstract: An electronic device is provided that includes a photodiode. The photodiode includes a semiconductor region coupled to a node of application of a first voltage, and at least one semiconductor wall. The at least one semiconductor wall extends along at least a height of the photodiode and partially surrounds the semiconductor region.

Abstract: A semiconductor layer is doped with a first doping type and has an upper surface. A first electrode insulated from the semiconductor layer extending through the semiconductor layer from the upper surface. A second electrode insulated from the semiconductor layer extends through the semiconductor layer from the upper surface. The first and second electrodes are biased by a voltage to produce an electrostatic field within the semiconductor layer causing the formation of a depletion region. The depletion region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at first and second oppositely doped regions within the semiconductor substrate.