Patents by Inventor Francesca Arcioni

Francesca Arcioni has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220181246
    Abstract: A semiconductor device includes a semiconductor chip including an electrical contact arranged on a main surface of the semiconductor chip, an external connection element configured to provide a first electrical connection between the semiconductor device and a printed circuit board, and an electrical redistribution layer extending in a direction parallel to the main surface of the semiconductor chip and configured to provide a second electrical connection between the electrical contact of the semiconductor chip and the external connection element. The electrical redistribution layer includes a ground line connected to a ground potential and a signal line configured to carry an electrical signal having a wavelength.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 9, 2022
    Inventors: Walter HARTNER, Francesca ARCIONI, Tuncay ERDOEL, Vincenzo FIORE, Helmut KOLLMANN, Arif RONI, Emanuele STAVAGNA, Christoph WAGNER
  • Patent number: 11251146
    Abstract: A semiconductor device comprises a semiconductor chip having a radio-frequency circuit and a radio-frequency terminal, an external radio-frequency terminal, and a non-galvanic connection arranged between the radio-frequency terminal of the semiconductor chip and the external radio-frequency terminal, wherein the non-galvanic connection is designed to transmit a radio-frequency signal.
    Type: Grant
    Filed: April 6, 2020
    Date of Patent: February 15, 2022
    Assignee: Infineon Technologies AG
    Inventors: Walter Hartner, Francesca Arcioni, Birgit Hebler, Martin Richard Niessner, Claus Waechter, Maciej Wojnowski
  • Patent number: 10930541
    Abstract: A method of forming a chip arrangement is provided. The method includes: arranging a plurality of stacks on a carrier, each stack including a thinned semiconductor chip, a further layer, and a polymer layer between the further layer and the chip, each stack being arranged with the chip facing the carrier; joining the plurality of stacks with each other with an encapsulation material to form the chip arrangement; exposing the further layer; and forming a redistribution layer contacting the chips of the chip arrangement.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: February 23, 2021
    Assignee: Infineon Technologies AG
    Inventors: Thomas Kilger, Francesca Arcioni, Maciej Wojnowski
  • Patent number: 10916484
    Abstract: An electronic device is disclosed. In one example, the electronic device includes a solder ball, a dielectric layer comprising an opening, and a redistribution layer (RDL) comprising an RDL pad connected with the solder ball. The RDL pad including at least one void, the void being disposed at least in partial in an area of the RDL pad laterally outside of the opening of the dielectric layer.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 9, 2021
    Assignee: Infineon Technologies AG
    Inventors: Robert Fehler, Francesca Arcioni, Christian Geissler, Walter Hartner, Gerhard Haubner, Thorsten Meyer, Martin Richard Niessner, Maciej Wojnowski
  • Publication number: 20200321295
    Abstract: A semiconductor device comprises a semiconductor chip having a radio-frequency circuit and a radio-frequency terminal, an external radio-frequency terminal, and a non-galvanic connection arranged between the radio-frequency terminal of the semiconductor chip and the external radio-frequency terminal, wherein the non-galvanic connection is designed to transmit a radio-frequency signal.
    Type: Application
    Filed: April 6, 2020
    Publication date: October 8, 2020
    Inventors: Walter HARTNER, Francesca ARCIONI, Birgit HEBLER, Martin Richard NIESSNER, Claus WAECHTER, Maciej WOJNOWSKI
  • Publication number: 20190221465
    Abstract: A method of forming a chip arrangement is provided. The method includes: arranging a plurality of stacks on a carrier, each stack including a thinned semiconductor chip, a further layer, and a polymer layer between the further layer and the chip, each stack being arranged with the chip facing the carrier; joining the plurality of stacks with each other with an encapsulation material to form the chip arrangement; exposing the further layer; and forming a redistribution layer contacting the chips of the chip arrangement.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 18, 2019
    Inventors: Thomas Kilger, Francesca Arcioni, Maciej Wojnowski
  • Publication number: 20180374769
    Abstract: An electronic device is disclosed. In one example, the electronic device includes a solder ball, a dielectric layer comprising an opening, and a redistribution layer (RDL) comprising an RDL pad connected with the solder ball. The RDL pad including at least one void, the void being disposed at least in partial in an area of the RDL pad laterally outside of the opening of the dielectric layer.
    Type: Application
    Filed: June 21, 2018
    Publication date: December 27, 2018
    Applicant: Infineon Technologies AG
    Inventors: Robert Fehler, Francesca Arcioni, Christian Geissler, Walter Hartner, Gerhard Haubner, Thorsten Meyer, Martin Richard Niessner, Maciej Wojnowski
  • Patent number: 9577852
    Abstract: A common-mode suppressor for eliminating common-mode noise in high frequency differential data transmission systems and an associated method includes a long coiled differential transmission line configured to transfer data between a source and a load. The differential transmission line comprises a first conductive wire and a second conductive wire which are inductively and capacitively coupled and are laterally aligned or vertically aligned with each other. Further, the differential transmission line is matched for differential signals and un-matched for common-mode noise.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: February 21, 2017
    Assignee: Infineon Technologies AG
    Inventors: Maciej Wojnowski, Alexander Glas, Hubert Werthmann, Josef-Paul Schaffer, Francesca Arcioni, Gabriele Bettineschi
  • Publication number: 20160127157
    Abstract: A common-mode suppressor for eliminating common-mode noise in high frequency differential data transmission systems and an associated method includes a long coiled differential transmission line configured to transfer data between a source and a load. The differential transmission line comprises a first conductive wire and a second conductive wire which are inductively and capacitively coupled and are laterally aligned or vertically aligned with each other. Further, the differential transmission line is matched for differential signals and un-matched for common-mode noise.
    Type: Application
    Filed: November 3, 2014
    Publication date: May 5, 2016
    Inventors: Maciej Wojnowski, Alexander Glas, Hubert Werthmann, Josef-Paul Schaffer, Francesca Arcioni, Gabriele Bettineschi