Abstract: According to the invention, value errors in a recorded digital symbol are minimized by generating, from a high-speed sampling clock, a local clock which is synchronized to a selected sample time of a sampler which substantially over samples the received data stream, and then using the locally-generated clock to reconstruct the symbol synchronously with the locally-generated clock. The specific techniques are employed during the preamble of a synchronous system to select an optimum sample time for use in generating the local clock. Several specific techniques may be employed to mimize error. In order to find the center of a data symbol, particularly a binary digital data symbol in a digital data stream, a Read Only Memory (ROM) may be provided in which is stored all combinations of addresses of taps for the center of a symbol in response to address input representing the binary value of the signal in a shift register.