Patents by Inventor Franck Fournel
Franck Fournel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE COMPRISING AN INTERFACE REGION INCLUDING AGGLOMERATES
Publication number: 20240030033Abstract: A method for producing a semiconductor structure comprises: a) providing a working layer of a semiconductor material; b) providing a carrier substrate of a semiconductor material; c) depositing a thin film of a semiconductor material different from that or those of the working layer and the carrier substrate on a free face to be joined of the working layer and/or the carrier substrate; d) directly joining the free faces of the working layer and the carrier substrate, e) annealing the joined structure at an elevated temperature to bring about segmentation of the encapsulated thin film and form a semiconductor structure comprising an interface region between the working layer and the carrier substrate, the interface region comprising: —regions of direct contact between the working layer and the carrier substrate; and —agglomerates comprising the semiconductor material of the thin film adjacent the regions of direct contact.Type: ApplicationFiled: November 29, 2021Publication date: January 25, 2024Inventors: Gweltaz Gaudin, Ionut Radu, Franck Fournel, Julie Widiez, Didier Landru -
Publication number: 20230110410Abstract: Method comprising the following steps: i) manufacturing components on a face of a substrate fastened to a first temporary substrate, ii) fastening a second temporary substrate onto the substrate, iii) removing the first temporary substrate, iv) manufacturing components on another face of the substrate, the first and second temporary substrates having surface areas greater than the surface area of the substrate of interest, during step ii), an adhesive film is disposed between the substrate and the first temporary substrate or between the substrate and the second temporary substrate, the adhesive film forming a lateral band around the substrate and adhering to the temporary substrates, the adhesion energy E1 between the substrate of interest and the first temporary substrate being greater than the adhesion energy E2 between the substrate of interest and the second temporary substrate, the adhesion energy E31 between the first temporary substrate and the adhesive film being lower than the adhesion energy E32Type: ApplicationFiled: October 3, 2022Publication date: April 13, 2023Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Pierre MONTMEAT, Franck FOURNEL
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Patent number: 10818500Abstract: The invention aims for a wafer edge trimming method 1 adhered on a support wafer 2 by way of an interface layer 3. A zone at the perimeter 12 of the wafer 1 is trimmed by grinding. The stopping of the grinding is advantageously done at the level of the interface layer 3. To do this, an interface layer 3 comprising a transition layer 4 having a resistance to grinding greater than that of the wafer 1 is used. According to a possibility, detecting an increase of the resistance to grinding during the grinding is done, so as to stop the grinding.Type: GrantFiled: December 21, 2018Date of Patent: October 27, 2020Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Franck Fournel, Christophe Morales, Marc Zussy
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Publication number: 20190206693Abstract: The invention aims for a wafer edge trimming method 1 adhered on a support wafer 2 by way of an interface layer 3. A zone at the perimeter 12 of the wafer 1 is trimmed by grinding. The stopping of the grinding is advantageously done at the level of the interface layer 3. To do this, an interface layer 3 comprising a transition layer 4 having a resistance to grinding greater than that of the wafer 1 is used. According to a possibility, detecting an increase of the resistance to grinding during the grinding is done, so as to stop the grinding.Type: ApplicationFiled: December 21, 2018Publication date: July 4, 2019Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Franck Fournel, Christophe Morales, Marc Zussy
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Patent number: 9824912Abstract: There is provided a method for transforming an electronic device from an initial state, wherein the device includes a first substrate and a second substrate, the first and second substrates being joined by means of a bonding interfaced using their respective first faces, wherein the first substrate includes at least one cavity, produced using the first face of the first substrate, the cavity including a bottom bordered by at least one peripheral region and being at least partially filled with a buffer layer, in the bottom of the cavity, and wherein the first face of the second substrate is at least partly opposite the cavity of the first substrate. The method also includes a step of removing the bottom of the cavity of the first substrate from a first face, opposite to the first face of the first substrate.Type: GrantFiled: December 16, 2015Date of Patent: November 21, 2017Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Michel Pellat, Franck Fournel, Pierre Montmeat
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Patent number: 9769931Abstract: A method for producing an electronic device including in a stack at least a first structure and a second structure, the structures being obtained from a first substrate and a second substrate. Marks are obtained from a pattern made on one of the substrates. Furthermore, the same supporting members are used during the bonding phase for the preparation of the marks and for the bonding phase for the assembly of the structures.Type: GrantFiled: July 29, 2016Date of Patent: September 19, 2017Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Franck Fournel, Chrystel Deguet
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Patent number: 9718261Abstract: A method for assembling two substrates by molecular adhesion comprises: a first step (a) of putting first and second substrates in close contact in order to form an assembly having an assembly interface; a second step (b) of reinforcing the degree of adhesion of the assembly beyond a threshold adhesion value at which water is no longer able to diffuse along the assembly interface. The method also comprises a step (c) of anhydrous treatment of the first and second substrates in a treatment atmosphere having a dew point below ?10° C., and control of the dew point of a working atmosphere to which the first and second substrates are exposed from the anhydrous treatment step (c) until the end of the second step (b) so as to limit or prevent the appearance of bonding defects at the assembly interface.Type: GrantFiled: November 20, 2015Date of Patent: August 1, 2017Assignees: SOITEC, Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Didier Landru, Capucine Delage, Franck Fournel, Elodie Beche
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Publication number: 20170034919Abstract: A method for producing an electronic device including in a stack at least a first structure and a second structure, the structures being obtained from a first substrate and a second substrate. Marks are obtained from a pattern made on one of the substrates. Furthermore, the same supporting members are used during the bonding phase for the preparation of the marks and for the bonding phase for the assembly of the structures.Type: ApplicationFiled: July 29, 2016Publication date: February 2, 2017Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Franck FOURNEL, Chrystel DEGUET
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Publication number: 20160181139Abstract: There is provided a method for transforming an electronic device from an initial state, wherein the device includes a first substrate and a second substrate, the first and second substrates being joined by means of a bonding interfaced using their respective first faces, wherein the first substrate includes at least one cavity, produced using the first face of the first substrate, the cavity including a bottom bordered by at least one peripheral region and being at least partially filled with a buffer layer, in the bottom of the cavity, and wherein the first face of the second substrate is at least partly opposite the cavity of the first substrate. The method also includes a step of removing the bottom of the cavity of the first substrate from a first face, opposite to the first face of the first substrate.Type: ApplicationFiled: December 16, 2015Publication date: June 23, 2016Applicant: Commissariat a L'Energie Atomique et aux Energies AlternativesInventors: Michel PELLAT, Franck Fournel, Pierre Montmeat
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Publication number: 20160152017Abstract: A method for assembling two substrates by molecular adhesion comprises: a first step (a) of putting first and second substrates in close contact in order to form an assembly having an assembly interface; a second step (b) of reinforcing the degree of adhesion of the assembly beyond a threshold adhesion value at which water is no longer able to diffuse along the assembly interface. The method also comprises a step (c) of anhydrous treatment of the first and second substrates in a treatment atmosphere having a dew point below ?10° C., and control of the dew point of a working atmosphere to which the first and second substrates are exposed from the anhydrous treatment step (c) until the end of the second step (b) so as to limit or prevent the appearance of bonding defects at the assembly interface.Type: ApplicationFiled: November 20, 2015Publication date: June 2, 2016Inventors: Didier Landru, Capucine Delage, Franck Fournel, Elodie Beche
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Patent number: 9209068Abstract: A method for treating at least one first material layer including siloxane bonds, wherein at least one surface can be interlocked with a surface of a second material layer by direct bonding, the method including: at least one forced diffusion at a temperature greater than or equal to 30° C., at least in the first material layer, of chemical species including at least one pair of free electrons and at least one labile proton; and converting at least one portion of the siloxane bonds into silanol bonds in at least one portion of the first material layer extending from the surface to a depth greater than or equal to approximately 10 nm.Type: GrantFiled: October 24, 2012Date of Patent: December 8, 2015Assignee: Commissariat a l'energie atomique et aux energies alternativesInventors: Hubert Moriceau, Franck Fournel, Christophe Morales, Caroline Rauer
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Publication number: 20150194337Abstract: A method for treating at least one first material layer including siloxane bonds, wherein at least one surface can be interlocked with a surface of a second material layer by direct bonding, the method including: at least one forced diffusion at a temperature greater than or equal to 30° C., at least in the first material layer, of chemical species including at least one pair of free electrons and at least one labile proton; and converting at least one portion of the siloxane bonds into silanol bonds in at least one portion of the first material layer extending from the surface to a depth greater than or equal to approximately 10 nm.Type: ApplicationFiled: October 24, 2012Publication date: July 9, 2015Applicant: Commissariat a I'energie atomique et aux ene altInventors: Hubert Moriceau, Franck Fournel, Christophe Morales, Caroline Rauer
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Patent number: 8871607Abstract: A method for producing a hybrid substrate, including a support substrate, a continuous buried insulator layer and, on this continuous layer, a hybrid layer including alternating zones of a first material and at least one second material, wherein these two materials are different by their nature and/or their crystallographic characteristics. The method forms a hybrid layer, including alternating zones of first and second materials, on a homogeneous substrate, assembles this hybrid layer, the continuous insulator layer and the support substrate, and eliminates a part at least of the homogeneous substrate, before or after the assembling.Type: GrantFiled: June 6, 2008Date of Patent: October 28, 2014Assignees: S.O.I. TEC Silicon on Insulator Technologies, Commissariat a l'Energie AtomiqueInventors: Thomas Signamarcheix, Franck Fournel, Hubert Moriceau
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Patent number: 8841202Abstract: A method of producing a hybrid substrate includes preparing a monocrystalline first substrate to obtain two surface portions. A temporary substrate is prepared including a mixed layer along which extends one surface portion and is formed of first areas and adjacent different second areas of amorphous material, the second areas forming at least part of the free surface of the first substrate. The first substrate is bonded to the other surface portion with the same crystal orientation as the first surface portion, by molecular bonding over at least the amorphous areas. A solid phase recrystallization of at least part of the amorphous areas according to the crystal orientation of the first substrate is selectively carried and the two surface portions are separated.Type: GrantFiled: February 12, 2010Date of Patent: September 23, 2014Assignee: Commissariat a l'Energie AtomiqueInventors: Franck Fournel, Thomas Signamarcheix, Laurent Clavelier, Chrystel Deguet
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Patent number: 8501589Abstract: A process for forming a thin film of a given material includes providing a first substrate having, on the surface, an amorphous and/or polycrystalline film of the given material and a second substrate is bonded to the first substrate by hydrophobic direct bonding (molecular adhesion), the second substrate having a single-crystal reference film of a given crystallographic orientation on the surface thereof. A heat treatment is applied at least to the amorphous and/or polycrystalline film, where the heat treatment causes at least a portion of the amorphous and/or polycrystalline film to undergo solid-phase recrystallization along the crystallographic orientation of the reference film, where the reference film acts as a recrystallization seed. The at least partly recrystallized film is then separated from at least a portion of the reference film.Type: GrantFiled: October 29, 2009Date of Patent: August 6, 2013Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Franck Fournel, Thomas Signamarcheix, Laurent Clavelier, Chrystel Deguet
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Patent number: 8445122Abstract: A data storage medium includes a carrier substrate having an electrode layer on the surface thereof and a sensitive material layer extending along the electrode layeradapted to be locally modified between two electrical states by the action of a localized electric field. A reference plane extends globally parallel to the sensitive material layer and is configured to accommodate at least one element for application of an electrostatic field in combination with the electrode layer the electrode layer including a plurality of conductive portions having a dimension at most equal to 100 nm in at least one direction parallel to the reference plane and separated by at least one electrically insulative zone, where at least some of the conductive portions are electrically interconnected, the conductive portions defining data write/read locations within the sensitive material layer.Type: GrantFiled: December 18, 2008Date of Patent: May 21, 2013Assignees: Commissariat a l 'Energie Atomique, S.O.I. Tec Silicon on Insulator TechnologiesInventors: Chrystel Deguet, Laurent Clavelier, Franck Fournel, Jean-Sebastien Moulet
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Patent number: 8389379Abstract: A method of making a complex microelectronic structure by assembling two substrates through two respective linking surfaces, the structure being designed to be dissociated at a separation zone. Prior to assembly, in producing a state difference in the tangential stresses between the two surfaces to be assembled, the state difference is selected so as to produce in the assembled structure a predetermined stress state at the time of dissociation.Type: GrantFiled: December 1, 2009Date of Patent: March 5, 2013Assignee: Commissariat a l'Energie AtomiqueInventors: Franck Fournel, Hubert Moriceau, Christelle Lagahe
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Patent number: 8318555Abstract: A method for producing a hybrid substrate includes preparing a first substrate including a mixed layer and an underlying electrically insulating continuous layer, the mixed layer made up of first single-crystal areas and second adjacent amorphous areas, the second areas making up at least part of the free surface of the first substrate. A second substrate is bonded to the first substrate, the second substrate including on the surface thereof, a reference layer with a predetermined crystallographic orientation. The first substrate is bonded to the second substrate by hydrophobic molecular bonding of at least the amorphous areas. A recrystallization of at least part of the amorphous areas to solid phase is carried out according to the crystallographic orientation of the reference layer, and the two substrates are separated at the bonding interface.Type: GrantFiled: October 29, 2009Date of Patent: November 27, 2012Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventors: Thomas Signamarcheix, Franck Fournel, Laurent Clavelier, Chrystel Deguet
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Patent number: 8309431Abstract: A method for self-supported transfer of a fine layer, in which at least one species of ions is implanted in a source-substrate at a specified depth in relation to the surface of the source-substrate. A stiffener is applied in intimate contact with the source-substrate and the source-substrate undergoes a heat treatment at a specified temperature during a specified period of time in order to create an embrittled buried area substantially at the specified depth without causing a thin layer, defined between the surface and the embrittled buried layer in relation to the remainder of the source-substrate, to become thermally detached. A controlled localized energy pulse is applied to the source-substrate in order to cause the self-supported detachment of the thin layer.Type: GrantFiled: October 28, 2004Date of Patent: November 13, 2012Assignee: Commissariat a l'Energie AtomiqueInventors: Nguyet-Phuong Nguyen, Ian Cayrefourcq, Christelle Lagahe-Blanchard, Konstantin Bourdelle, Aurélie Tauzin, Franck Fournel
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Patent number: 8252663Abstract: A method of transferring a thin layer from a source substrate having a surface layer of a first material along a free surface thereof to a target substrate having at least one surface layer of a second material along a free surface thereof, where the first material differs from the second material, includes forming within the surface layer of the source substrate a weakened zone delimiting a thin layer with respect to the free surface, and assembling the free surface of the source substrate to the free surface of the target substrate in a stack of alternating layers comprising the first and second materials, so that there are, on either side of an interface formed by bringing the free surfaces into intimate contact. The cumulative thicknesses of the layers of the first material are substantially equal to the cumulative thickness of the layers of the second material, the layers having thicknesses at least equal to 50 microns and at least 1000 times the depth at which the weakened zone is formed.Type: GrantFiled: June 17, 2010Date of Patent: August 28, 2012Assignee: Commissariat a l'Energie Atomique et aux Energies AlternativesInventor: Franck Fournel