Patents by Inventor Francois M. D'Heurle

Francois M. D'Heurle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5624869
    Abstract: A method and a device directed to the same, for stabilizing cobalt di-silicide/single crystal silicon, amorphous silicon, polycrystalline silicon, germanide/crystalline germanium, polycrystalline germanium structures or other semiconductor material structures so that high temperature processing steps (above 750.degree. C.) do not degrade the structural quality of the cobalt di-silicide/silicon structure. The steps of the method include forming a di-silicide or germanide by either reacting cobalt with the substrate material and/or the codeposition of the di-silicide or germanide on a substrate, adding a selective element, either platinum or nitrogen, into the cobalt and forming the di-silicide or germanide by a standard annealing treatment. Alternatively, the cobalt di-silicide or cobalt germanide can be formed after the formation of the di-silicide or germanide respectively. As a result, the upper limit of the annealing temperature at which the di-silicide or germanide will structurally degrade is increased.
    Type: Grant
    Filed: April 13, 1994
    Date of Patent: April 29, 1997
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Agnello, Cyril Cabral, Jr., Lawrence A. Clevenger, Matthew W. Copel, Francois M. d'Heurle, Qi-Zhong Hong
  • Patent number: 5608266
    Abstract: A method and a device directed to the same, for stabilizing cobalt silicide/single crystal silicon, amorphous silicon, polycrystalline silicon, germanide/crystalline germanium, polycrystalline germanium structures or other semiconductor material structures so that high temperature processing steps (above 750.degree. C.) do not degrade the structural quality of the cobalt silicide/silicon structure. The steps of the method include forming a silicide or germanide by either reacting cobalt with the substrate material and/or the codeposition of the silicide or germanide on a substrate, adding a selective element, either platinum or nitrogen, into the cobalt and forming the silicide germanide by a standard annealing treatment. Alternatively, the cobalt silicide or cobalt germanide can be formed after the formation of the silicide or germanide respectively. As a result, the upper limit of the annealing temperature at which the silicide or germanide will structurally degrade is increased.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: March 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Agnello, Cyril Cabral, Jr., Lawrence A. Clevenger, Matthew W. Copel, Francois M. d'Heurle, Qi-Zong Hong
  • Patent number: 5510295
    Abstract: The phase transformation temperature of a metal silicide layer formed overlying a silicon layer on a semiconductor wafer is lowered. First, a refractory metal is disposed proximate to the surface of the silicon layer, a precursory metal is deposited in a layer overlying the refractory metal, and the wafer is heated to a temperature sufficient to form the metal silicide from the precursory metal. The precursory metal may be a refractory metal, and is preferably titanium, tungsten, or cobalt. The concentration of the refractory metal at the surface of the silicon layer is preferably less than about 10.sup.17 atoms/cm.sup.3. The refractory metal may be Mo, Co, W, Ta, Nb, Ru, or Cr, and more preferably is Mo or Co. The heating step used to form the silicide is performed at a temperature less than about 700.degree. C., and more preferably between about 600.degree.-700.degree. C.
    Type: Grant
    Filed: October 29, 1993
    Date of Patent: April 23, 1996
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Lawrence A. Clevenger, Francois M. d'Heurle, James M. E. Harper, Randy W. Mann, Glen L. Miles, Donald W. D. Rakowski
  • Patent number: 5143867
    Abstract: A method for filling VLSI high aspect ratio vias and lines in VLSI interconnection structures, with a low resistivity metal at temperatures below 400.degree. C. A low melting point alloy of a desired low resistivity metal is deposited into the high aspect ratio vias or lines. The alloy is then purified in place by bringing the alloying element to the surface of the deposited alloy and removing the element from said surface thereby leaving the low resistivity metal in the interconnection structure. In one embodiment, the alloy is purified by using a low temperature oxidation process to allow the alloying element to diffuse to the surface of the deposited alloy where a surface oxide is formed. The surface oxide is then removed by chemical etching or by chemical mechanical polishing. In a second embodiment, a continuous exposure to a plasma etching or reactive ion etching will steadily remove the alloying element from the surface of the deposited alloy.
    Type: Grant
    Filed: February 13, 1991
    Date of Patent: September 1, 1992
    Assignee: International Business Machines Corporation
    Inventors: Francois M. d'Heurle, James M. E. Harper
  • Patent number: 4012756
    Abstract: In accordance with the disclosure, certain impurities, e.g., alloying additions, are introduced in thin metal film to negate the driving force or the effect of the driving force which causes the hillock formation. Such thin metallic films are usually fabricated on the substrates which have different thermal coefficients of expansion than the film itself, and during thermal cycling stresses can be introduced into the film. This stress may serve as a driving force for atom movement and, therefore, to the formation of hillocks. The vehicle by which the induced stress in a film effects the requisite atom movement is via defect movement, and when the force is compressive this gives rise to hillocks. In the practice of this disclosure, impurity additions introduced into a film affect hillock growth by their interaction with the defects which give rise to the requisite atom movement.
    Type: Grant
    Filed: January 27, 1975
    Date of Patent: March 15, 1977
    Assignee: International Business Machines Corporation
    Inventors: Praveen Chaudhari, Francois M. D'Heurle, Amitava Gangulee