Patents by Inventor Franjo Ivancic

Franjo Ivancic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210004470
    Abstract: Aspects of the disclosure provide for automatically generating patches for security violations. For example, a plurality of inputs may be generated for code. The code may be executed using the plurality of inputs to obtain execution states at a plurality of code locations. The execution states may include at least one security violation for at least some of the plurality of inputs. Using the execution states, one or more patch conditions causing the at least one security violation may be determined. Using the execution states, one or more corresponding patch locations may be determined based on a code location of the plurality of code locations where the at least one security violation each of the one or more patch conditions occurred. At least one candidate patch for the at least one security violation may be automatically generated. The at least one candidate patch may include one of the patch conditions and one of the corresponding patch locations.
    Type: Application
    Filed: July 17, 2018
    Publication date: January 7, 2021
    Applicant: Google LLC
    Inventors: Domagoj Babic, Omer Tripp, Franjo Ivancic, Sam Kerner, Markus Kusano, Timothy King, Stefan Bucur, Wei Wang, László Szekeres
  • Patent number: 10095610
    Abstract: A system and method are provided for testing the performance of applications. By way of example only, the method may include training a neural network with documents containing text elements that are arranged in accordance with a defined format and using the neural network to determine the predictability of the value of individual text elements within a test document. When the neural network indicates that the value of a text element is unlikely, the value may be modified and the modified document may be used to test an application that processes documents in accordance with the defined format.
    Type: Grant
    Filed: February 21, 2018
    Date of Patent: October 9, 2018
    Assignee: Google LLC
    Inventors: Franjo Ivancic, László Szekeres, Domagoj Babic
  • Publication number: 20180181486
    Abstract: A system and method are provided for testing the performance of applications. By way of example only, the method may include training a neural network with documents containing text elements that are arranged in accordance with a defined format and using the neural network to determine the predictability of the value of individual text elements within a test document. When the neural network indicates that the value of a text element is unlikely, the value may be modified and the modified document may be used to test an application that processes documents in accordance with the defined format.
    Type: Application
    Filed: February 21, 2018
    Publication date: June 28, 2018
    Inventors: Franjo Ivancic, László Szekeres, Domagoj Babic
  • Publication number: 20180143896
    Abstract: A system and method are provided for testing the performance of applications. By way of example only, the method may include training a neural network with documents containing text elements that are arranged in accordance with a defined format and using the neural network to determine the predictability of the value of individual text elements within a test document. When the neural network indicates that the value of a text element is unlikely, the value may be modified and the modified document may be used to test an application that processes documents in accordance with the defined format.
    Type: Application
    Filed: November 23, 2016
    Publication date: May 24, 2018
    Inventors: Franjo Ivancic, Laszlo Szekeres, Domagoj Babic
  • Patent number: 9977729
    Abstract: A system and method are provided for testing the performance of applications. By way of example only, the method may include training a neural network with documents containing text elements that are arranged in accordance with a defined format and using the neural network to determine the predictability of the value of individual text elements within a test document. When the neural network indicates that the value of a text element is unlikely, the value may be modified and the modified document may be used to test an application that processes documents in accordance with the defined format.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: May 22, 2018
    Assignee: Google LLC
    Inventors: Franjo Ivancic, Laszlo Szekeres, Domagoj Babic
  • Patent number: 9736064
    Abstract: Methods and systems for finding a packet's routing path in a network includes intercepting control messages sent by a controller to one or more switches in a software defined network (SDN). A state of the SDN at a requested time is emulated and one or more possible routing paths through the emulated SDN is identified by replaying the intercepted control messages to one or more emulated switches in the emulated SDN. The one or more possible routing paths correspond to a requested packet injected into the SDN at the requested time.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: August 15, 2017
    Assignee: NEC Corporation
    Inventors: Hui Zhang, Behnaz Arzani, Franjo Ivancic, Junghwan Rhee, Nipun Arora, Guofei Jiang
  • Publication number: 20160239407
    Abstract: Provided are methods and systems for automated generation of small scale integration tests to keep mocked input-output contract expectations of external objects synchronized with the actual implementation of the external objects. Such synchronization is achieved through automated creation of small scale integration tests by replacing expected input-output behaviors of mocked interactions with actual code sequences of the mocked interaction. The methods and systems utilize automated test generators with search-based software engineering methods to reuse and adapt developer written tests into new automatically generated tests.
    Type: Application
    Filed: February 18, 2015
    Publication date: August 18, 2016
    Applicant: GOOGLE INC.
    Inventor: Franjo IVANCIC
  • Publication number: 20150172185
    Abstract: Methods and systems for finding a packet's routing path in a network includes intercepting control messages sent by a controller to one or more switches in a software defined network (SDN). A state of the SDN at a requested time is emulated and one or more possible routing paths through the emulated SDN is identified by replaying the intercepted control messages to one or more emulated switches in the emulated SDN. The one or more possible routing paths correspond to a requested packet injected into the SDN at the requested time.
    Type: Application
    Filed: December 16, 2014
    Publication date: June 18, 2015
    Inventors: Hui Zhang, Behnaz Arzani, Franjo Ivancic, Junghwan Rhee, Nipun Arora, Guofei Jiang
  • Patent number: 8924938
    Abstract: A system and method for analyzing a computer program includes performing a static analysis on a program to determine property correctness. Test cases are generated and conducted to provide test output data. Hypotheses about aspects of execution of the program are produced to classify paths for test cases to determine whether the test cases have been encountered or otherwise. In accordance with the hypothesis, new test cases are generated to cause the program to exercise behavior which is outside of the encountered test cases.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 30, 2014
    Assignee: NEC Laboratories America, Inc.
    Inventors: Richard Chang, Sriram Sankaranarayanan, Guofei Jiang, Franjo Ivancic
  • Publication number: 20140337674
    Abstract: A network testing method implemented in a software-defined network (SDN) is disclosed. The network testing method comprising providing a test scenario including one or more network events, injecting said one or more network events to the SDN using an SDN controller, and gathering network traffic statistics. A network testing apparatus used in a software-defined network (SDN) also is disclosed. The network testing apparatus comprising a testing system to provide a test scenario including one or more network events, to inject said one or more network events to the SDN using an SDN controller, and to gather network traffic statistics. Other methods, apparatuses, and systems also are disclosed.
    Type: Application
    Filed: May 6, 2014
    Publication date: November 13, 2014
    Applicant: NEC Laboratories America, Inc.
    Inventors: Franjo Ivancic, Cristian Lumezanu, Gogul Balakrishnan, Willard Dennis, Aarti Gupta
  • Publication number: 20140289712
    Abstract: Disclosed are typestate and lifetime dependency analysis methods for identifying bugs in C++ programs. Disclosed are an abstract representation (ARC++) that models C++ objects and which makes object creation/destruction, usage, lifetime and pointer operations explicit in the abstract model thereby providing a basis for static analysis on the C++ program. Also disclosed is a lifetime dependency analysis that tracks implied dependency relationships between lifetimes of objects, to capture an effective high-level abstraction for issues involving temporary objects and internal buffers, and subsequently used in the static analysis that supports typestate checking for the C++ program. Finally disclosed a framework that automatically genarates ARC++ representations from C++ programs and performs typestate checking to detect bugs that are specified as typestate automata over ARC++ representations.
    Type: Application
    Filed: March 6, 2014
    Publication date: September 25, 2014
    Applicant: NEC Laboratories America, Inc.
    Inventors: Aarti Gupta, Gogul Balakrishnan, Franjo Ivancic, Xusheng Xiao
  • Patent number: 8799194
    Abstract: Systems and methods for model checking of live systems are shown that include learning an interval discrete-time Markov chain (IDTMC) model of a deployed system from system logs; and checking the IDTMC model with a processor to determine a probability of violating one or more probabilistic safety properties. Checking the IDTMC model includes calculating a linear part exactly using affine arithmetic; and over-approximating a non-linear part using interval arithmetic.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: August 5, 2014
    Assignee: NEC Laboratories America, Inc.
    Inventors: Parasara Sridhar Duggirala, Khalil Ghorbal, Franjo Ivancic, Vineet Kahlon, Aarti Gupta
  • Patent number: 8719790
    Abstract: A computer implemented program analysis method employing a set of new abstract domains applicable to non-convex invarients. The method analyzes programs statically using abstract interpretation while advantageously considering non-convex structures and in particular those situations in which an internal region of an unreachable state exists within a larger region of reachable states. The method employs a new set of non-convex domains (donut domains) based upon the notion of an outer convex region of reachable states (Domain D1) and an inner region of unreachable states (Domain D2) which advantageously permits capture of non-convex properties by using convex regions and operations.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: May 6, 2014
    Assignee: NEC Laboratories America, Inc.
    Inventors: Khalil Ghorbal, Franjo Ivancic, Gogul Balakrishnan, Naoto Maeda
  • Patent number: 8719802
    Abstract: An interprocedural exception analysis and transformation framework for computer programming languages such as C++ that (1) captures the control-flow induced by exceptions precisely, and (2) transforms the given computer program into an exception-free program that is amenable for precise static analysis, verification, and optimizations.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: May 6, 2014
    Assignees: NEC Laboratories America, Inc., NEC Corporation
    Inventors: Naoto Maeda, Prakash Prabhu, Gogul Balakrishnan, Franjo Ivancic, Aarti Gupta
  • Patent number: 8719793
    Abstract: A scalable, computer implemented method for finding subtle flaws in software programs. The method advantageously employs 1) scope bounding which limits the size of a generated model by excluding deeply-nested function calls, where the scope bounding vector is chosen non-monotonically, and 2) automatic specification inference which generates constraints for functions through the effect of a light-weight and scalable global analysis. Advantageously, scalable software model checking is achieved while at the same time finding more bugs.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: May 6, 2014
    Assignees: NEC Laboratories America, Inc., NEC Corporation
    Inventors: Naoto Maeda, Franjo Ivancic, Sriram Sankaranarayanan, Aarti Gupta
  • Patent number: 8707278
    Abstract: A model is provided for transforming a program with a priori given class hierarchy that is induced by inheritance. An inheritance remover is configured to remove inheritance from a given program to produce an analysis-friendly program which does not include virtual-function pointer tables and runtime libraries associated with inheritance-related operations. The analysis-friendly program preserves the semantics of the given program with respect to a given class hierarchy. A clarifier is configured to identify implicit expressions and function calls and transform the given program into at least one intermediate program having explicit expressions and function calls.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: April 22, 2014
    Assignee: NEC Laboratories America, Inc.
    Inventors: Gogul Balakrishnan, Naoto Maeda, Franjo Ivancic, Nishant Sinha, Aarti Gupta, Jing Yang
  • Publication number: 20130332906
    Abstract: A method to test a concurrent program by performing a concolic multi-trace analysis (CMTA) to analyze the concurrent program by taking two or more test runs over many threads and generating a satisfiability modulo theory (SMT) formula to select alternate inputs, alternate schedules and parts of threads from one or more test runs; using an SMT solver on the SMT formula for generating a new concurrent test comprising input values, thread schedules and parts of thread selections; and executing the new concurrent test.
    Type: Application
    Filed: May 1, 2013
    Publication date: December 12, 2013
    Inventors: Niloofar Razavi, Franjo Ivancic, Vineet Kahlon, Aarti Gupta
  • Patent number: 8538900
    Abstract: A system and method for deciding the satisfiability of a non-linear real decision problem is disclosed. Linear and non-linear constraints associated with the problem are separated. The feasibility of the linear constraints is determined using a linear solver. The feasibility of the non-linear constraints is determined using a non-linear solver which employs interval constraint propagation. The interval solutions obtained from the non-linear solver are validated using the linear solver. If the solutions cannot be validated, linear constraints are learned to refine a search space associated with the problem. The learned constraints and the non-linear constraints are iteratively solved using the non-linear solver until either a feasible solution is obtained or no solution is possible.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: September 17, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Malay K. Ganai, Sicun Gao, Franjo Ivancic, Aarti Gupta
  • Patent number: 8539013
    Abstract: A system and method for solving a decision problem having Boolean combinations of linear and non-linear operations includes translating the non-linear real operations using a COordinate Rotation DIgital Computer (CORDIC) method programmed on a computer device into linear operations maintaining a given accuracy. Linear and translated linear operations are combined into a formula. Satisfiability of the formula is solved using a decision procedure for Boolean combinations of linear operations over integers and reals.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: September 17, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Malay K. Ganai, Franjo Ivancic
  • Patent number: 8539451
    Abstract: Methods and systems for verifying the precision of a program that utilizes floating point operations are disclosed. Interval and affine arithmetic can be employed to build a model of the program including floating point operations and variables that are expressed as reals and integers, thereby permitting accurate determination of precision loss using a model checker. Abstract interpretation can be also employed to simplify the model. In addition, counterexample-guided abstraction refinement can be used to refine the values of parametric error constants introduced in the model.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: September 17, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Franjo Ivancic, Malay K. Ganai, Sriram Sankaranarayanan, Aarti Gupta