Abstract: A control apparatus is disclosed that comprises a primary proportional, integral, differential (“PID”) controller capable of receiving a first setpoint and a first process variable and generating therefrom a second setpoint; and a secondary controller capable of receiving the second setpoint and a second process variable and generating therefrom an output control signal, wherein the primary PID controller is capable of receiving from the secondary controller a feedback signal 1) that indicates that a previous value of the second setpoint exceeds a limit associated with an output control signal of the secondary controller, and 2) that transfers a value of a signal from the secondary controller. The primary PID controller is then capable of limiting the contribution of the integral calculation component in a PID calculation that generates a new current value of the second setpoint.

Abstract: Variable incrementation of an analog output signal is achieved by using a variable frequency clock generator for providing input signals to be counted by a presettable counter. The counter is preset by a digital word from a control processor which may include a digital computer. An output signal from the counter is applied to a digital-to-analog converter to produce a process control analog signal. The output signal of the variable frequency clock generator is obtained by a sequential selection of a plurality of differing fixed frequency signals from a frequency divider arranged to generate a plurality of lower frequency signals from a fixed frequency clock signal source. A second counter is driven by an output of the frequency divider to further subdivide the clock source signal.

Abstract: A pulse duration to current converter wherein the output current is proportional to the duty cycle, or duration, of the input pulse. A first current source is modulated by an input signal while a second current source is held constant by an input reference signal level. The sum of the currents from the first and second current sources are averaged by a filter network to produce an output signal that is subsequently applied to the noninverting input of an amplifier to be amplified thereby. An output signal from the amplifier is converted to a current output by an output circuit driven by the amplifier. The output circuit will operate with maximum load impedances by using a level shifter at the input of the amplifier to shift the level of operation of the inverting input of the amplifier away from a power source level supplied to the amplifier.