Patents by Inventor Frank Lehnert
Frank Lehnert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11448410Abstract: A method of monitoring an air flow in a zone (1) of an HVAC system (10) is described, the zone (1) comprising a supply port (11) and a return port (12), a first flow sensor (111) configured to measure a supply flow (?1) through the supply port (11), and a second flow sensor (121) configured to measure a return flow (?2) through the return port (12), the method comprising: recording by a control system (20, 20?) the supply flow (?1) measured by the first flow sensor (111) and the return flow (?2) measured by the second flow sensor (121); determining by the control system (20, 20?) an infiltration and exfiltration component (?inf/exf), using the supply flow (?1) and the return flow (?2) recorded by the control system (20, 20?); and determining by the control system (20, 20?) an operational sensor state of at least one of the first flow sensor (111) and the second flow sensor (121), using the supply flow (?1), the return flow (?2), and the infiltration and exfiltration component (?inf/exf).Type: GrantFiled: February 14, 2020Date of Patent: September 20, 2022Assignee: BELIMO HOLDING AGInventors: Peter Schmidlin, Frank Lehnert, Urs Niederhauser, Marc Thuillard
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Patent number: 11391386Abstract: An actuator (1) comprises an electric motor (11) for moving an actuated part (2) to an actuated position. The actuator (1) further comprises a controller (10) connected to the electric motor (11) and configured to determine a motor current of the electric motor (11) and to detect motor rotations. The controller (10) is further configured to determine the actuated position by counting the motor rotations detected while the motor current is at or above a current threshold indicative of a load torque, and by not counting motor rotations detected while the motor current is below said current threshold.Type: GrantFiled: September 8, 2016Date of Patent: July 19, 2022Assignee: BELIMO HOLDING AGInventors: Marc Thuillard, Stefan Mischler, Frank Lehnert
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Patent number: 11036647Abstract: A method for operating translation look-aside buffers, TLBs, in a multiprocessor system. A purge request is received for purging one or more entries in the TLB. When the thread doesn't require access to the entries to be purged the execution of the purge request at the TLB may start. When an address translation request is rejected due to the TLB purge, a suspension time window may be set. During the suspension time window, the execution of the purge is suspended and address translation requests of the thread are executed. After the suspension window is ended the purge execution may be resumed. When the thread requires access to the entries to be purged, it may be blocked for preventing the thread sending address translation requests to the TLB and upon ending the purge request execution, the thread may be unblocked and the address translation requests may be executed.Type: GrantFiled: June 7, 2019Date of Patent: June 15, 2021Assignee: International Business Machines CorporationInventors: Uwe Brandt, Ute Gaertner, Lisa C. Heller, Markus Helms, Thomas Köhler, Frank Lehnert, Jennifer A. Navarro, Rebecca S. Wisniewski
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Patent number: 10956341Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: GrantFiled: January 27, 2020Date of Patent: March 23, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert
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Patent number: 10929312Abstract: Embodiments include techniques for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the techniques include receiving a zone purge request, including zone attribute information, and searching for matching zone attribute information in a zone register using the zone purge request. The techniques also include computing, based at least in part on the search, a state descriptor identifier (SDID) vector for each matching zone of the zone register, and reading TLB entries referenced in the zone purge request. The techniques include comparing an SDID of the TLB entry against an SDID specified in the SDID vector, and purging the TLB entries based on the comparison.Type: GrantFiled: May 7, 2019Date of Patent: February 23, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Ute Gaertner, Lisa C. Heller, Markus Helms, Christian Jacobi, Thomas Koehler, Frank Lehnert, Jennifer A. Navarro
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Publication number: 20200278129Abstract: A method of monitoring an air flow in a zone (1) of an HVAC system (10) is described, the zone (1) comprising a supply port (11) and a return port (12), a first flow sensor (111) configured to measure a supply flow (?1) through the supply port (11), and a second flow sensor (121) configured to measure a return flow (?2) through the return port (12), the method comprising: recording by a control system (20, 20?) the supply flow (?1) measured by the first flow sensor (111) and the return flow (?2) measured by the second flow sensor (121); determining by the control system (20, 20?) an infiltration and exfiltration component (?inf/exf), using the supply flow (?1) and the return flow (?2) recorded by the control system (20, 20?); and determining by the control system (20, 20?) an operational sensor state of at least one of the first flow sensor (111) and the second flow sensor (121), using the supply flow (?1), the return flow (?2), and the infiltration and exfiltration component (?inf/exf).Type: ApplicationFiled: February 14, 2020Publication date: September 3, 2020Applicant: BELIMO HOLDING AGInventors: Peter Schmidlin, Frank Lehnert, Urs Niederhauser, Marc Thuillard
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Publication number: 20200248828Abstract: An actuator (1) comprises an electric motor (11) for moving an actuated part (2) to an actuated position. The actuator (1) further comprises a controller (10) connected to the electric motor (11) and configured to determine a motor current of the electric motor (11) and to detect motor rotations. The controller (10) is further configured to determine the actuated position by counting the motor rotations detected while the motor current is at or above a current threshold indicative of a load torque, and by not counting motor rotations detected while the motor current is below said current threshold.Type: ApplicationFiled: April 20, 2020Publication date: August 6, 2020Applicant: BELIMO HOLDING AGInventors: Marc THUILLARD, Stefan Mischler, Frank Lehnert
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Patent number: 10698835Abstract: A method for operating translation look-aside buffers, TLBs, in a multiprocessor system. A purge request is received for purging one or more entries in the TLB. When the thread doesn't require access to the entries to be purged the execution of the purge request at the TLB may start. When an address translation request is rejected due to the TLB purge, a suspension time window may be set. During the suspension time window, the execution of the purge is suspended and address translation requests of the thread are executed. After the suspension window is ended the purge execution may be resumed. When the thread requires access to the entries to be purged, it may be blocked for preventing the thread sending address translation requests to the TLB and upon ending the purge request execution, the thread may be unblocked and the address translation requests may be executed.Type: GrantFiled: December 28, 2017Date of Patent: June 30, 2020Assignee: International Business Machines CorporationInventors: Uwe Brandt, Ute Gaertner, Lisa C. Heller, Markus Helms, Thomas Köhler, Frank Lehnert, Jennifer A. Navarro, Rebecca S. Wisniewski
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Publication number: 20200159670Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: ApplicationFiled: January 27, 2020Publication date: May 21, 2020Inventors: Uwe BRANDT, Markus HELMS, Christian JACOBI, Markus KALTENBACH, Thomas KOEHLER, Frank LEHNERT
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Patent number: 10635603Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: GrantFiled: April 8, 2019Date of Patent: April 28, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert
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Patent number: 10621105Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: GrantFiled: April 8, 2019Date of Patent: April 14, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert
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Patent number: 10423172Abstract: A device for measuring a volume flow in a ventilation pipe (1) comprises a sensor element (13) disposed on the mounting (8) and configured as a thermal anemometer. Upstream of the sensor element is a turbulence-generating element, which is configured and disposed at a distance from the sensor surface (18.1) such that highly turbulent flow is generated in the region of the sensor surface in a targeted manner. Downstream of the sensor surface is a flow element (20), which widens in the cross-section thereof in the flow direction (L), wherein starting from a height level of the sensor surface a height is reached that is greater than the height of the break-away edge (17.1) opposite the sensor surface.Type: GrantFiled: February 19, 2009Date of Patent: September 24, 2019Assignee: BELIMO HOLDING AGInventors: Urs Niederhauser, Frank Lehnert, Egli Egli, Phillip Holoch
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Publication number: 20190286573Abstract: A method for operating translation look-aside buffers, TLBs, in a multiprocessor system. A purge request is received for purging one or more entries in the TLB. When the thread doesn't require access to the entries to be purged the execution of the purge request at the TLB may start. When an address translation request is rejected due to the TLB purge, a suspension time window may be set. During the suspension time window, the execution of the purge is suspended and address translation requests of the thread are executed. After the suspension window is ended the purge execution may be resumed. When the thread requires access to the entries to be purged, it may be blocked for preventing the thread sending address translation requests to the TLB and upon ending the purge request execution, the thread may be unblocked and the address translation requests may be executed.Type: ApplicationFiled: June 7, 2019Publication date: September 19, 2019Inventors: Uwe Brandt, Ute Gaertner, Lisa C. Heller, Markus Helms, Thomas Köhler, Frank Lehnert, Jennifer A. Navarro, Rebecca S. Wisniewski
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Publication number: 20190258588Abstract: Embodiments include techniques for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the techniques include receiving a zone purge request, including zone attribute information, and searching for matching zone attribute information in a zone register using the zone purge request. The techniques also include computing, based at least in part on the search, a state descriptor identifier (SDID) vector for each matching zone of the zone register, and reading TLB entries referenced in the zone purge request. The techniques include comparing an SDID of the TLB entry against an SDID specified in the SDID vector, and purging the TLB entries based on the comparison.Type: ApplicationFiled: May 7, 2019Publication date: August 22, 2019Inventors: Uwe Brandt, Ute Gaertner, Lisa C. Heller, Markus Helms, Christian Jacobi, Thomas Koehler, Frank Lehnert, Jennifer A. Navarro
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Patent number: 10387326Abstract: A computer-implemented method includes associating an initial use order with a plurality of target sets of a translation lookaside buffer (TLB), where the initial use order indicates an order of use of the plurality of target sets. The plurality of target sets are associated with an initial least-recently-used (LRU) state based on the initial use order. A new use order for the plurality of target sets is generated. Generating the new use order includes moving a first target set to a least-recently-used position, responsive to a purge of the first target set. The LRU state of the plurality of target sets is updated based on the new use order, responsive to the purge of the first target set. The first target set is identified as eligible for replacement according to an LRU replacement policy of the TLB, based at least in part on the purge of the first target set.Type: GrantFiled: November 14, 2017Date of Patent: August 20, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Markus Helms, Thomas Köhler, Frank Lehnert
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Patent number: 10380032Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: GrantFiled: March 9, 2017Date of Patent: August 13, 2019Assignee: INTERNATINOAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert
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Patent number: 10380033Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: GrantFiled: October 31, 2017Date of Patent: August 13, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Markus Helms, Christian Jacobi, Markus Kaltenbach, Thomas Koehler, Frank Lehnert
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Publication number: 20190236025Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: ApplicationFiled: April 8, 2019Publication date: August 1, 2019Inventors: Uwe BRANDT, Markus HELMS, Christian JACOBI, Markus KALTENBACH, Thomas KOEHLER, Frank LEHNERT
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Publication number: 20190236024Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels.Type: ApplicationFiled: April 8, 2019Publication date: August 1, 2019Inventors: Uwe BRANDT, Markus HELMS, Christian JACOBI, Markus KALTENBACH, Thomas KOEHLER, Frank LEHNERT
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Patent number: 10353827Abstract: Embodiments include techniques for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the embodiments include receiving a zone purge request, including zone attribute information, and searching for matching zone attribute information in a zone register using the zone purge request. Embodiments also include computing, based at least in part on the search, a state descriptor identifier (SDID) vector for each matching zone of the zone register, and reading TLB entries referenced in the zone purge request. Embodiments include comparing an SDID of the TLB entry against an SDID specified in the SDID vector, and purging the TLB entries based on the comparison.Type: GrantFiled: June 7, 2017Date of Patent: July 16, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uwe Brandt, Ute Gaertner, Lisa C. Heller, Markus Helms, Christian Jacobi, Thomas Koehler, Frank Lehnert, Jennifer A. Navarro