Patents by Inventor Frank Wolter

Frank Wolter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11495680
    Abstract: Described herein is a power semiconductor device and corresponding method of production. The semiconductor device includes: a power device region formed in a semiconductor substrate and including first trenches and second trenches extending lengthwise in parallel with one another with semiconductor mesas between adjacent ones of the trenches, each first trench including a gate electrode at a first potential and each second trench including a field plate at a second potential; and a current sense region formed in the semiconductor substrate. A subset of the first trenches, a subset of the second trenches and a subset of the semiconductor mesas are common to both the current sense region and the power device region. The second trenches are interrupted along opposite first and second sides of the current sense region such that the field plates are interrupted between the power device region and the current sense region.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: November 8, 2022
    Assignee: Infineon Technologies Austria AG
    Inventors: Matteo Dainese, Georg Schinner, Frank Wolter
  • Publication number: 20220271156
    Abstract: A semiconductor die includes: a SiC substrate; power and current sense transistors integrated in the substrate such that the current sense transistor mirrors current flow in the main power transistor; a gate terminal electrically connected to gate electrodes of both transistors; a drain terminal electrically connected to a drain region in the substrate and which is common to both transistors; a source terminal electrically connected to source and body regions of the power transistor; a dual mode sense terminal; and a doped resistor region in the substrate between the transistors. The dual mode sense terminal is electrically connected to source and body regions of the current sense transistor. The doped resistor region has a same conductivity type as the body regions of both transistors and is configured as a temperature sense resistor that electrically connects the source terminal to the dual mode sense terminal.
    Type: Application
    Filed: February 22, 2021
    Publication date: August 25, 2022
    Inventors: Dethard Peters, Sascha Axel Baier, Tomas Manuel Reiter, Sandeep Walia, Frank Wolter
  • Patent number: 11417747
    Abstract: In an example, a transistor device is provided. The transistor device includes a plurality of transistor cells each including a gate electrode and each at least partially integrated in a semiconductor body that includes a wide bandgap semiconductor material. The transistor device includes a gate pad arranged on top of the semiconductor body, and a plurality of gate runners each arranged on top of the semiconductor body and each connected to gate electrodes of at least some of the plurality of transistor cells. Each gate runner of the plurality of gate runners has a longitudinal direction, and at least one of the gate runners includes at least a section in which a resistivity per area increases in the longitudinal direction as a distance to the gate pad along the gate runner increases.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: August 16, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Aichinger, Wolfgang Bergner, Ralf Siemieniec, Frank Wolter
  • Publication number: 20220234598
    Abstract: A method of calculation a vehicle load comprising a first vehicle load value based at least on air pressures in air springs and height data of suspension of a vehicle axle, determining a second vehicle load value based on a change of track width of the vehicle axle, and calculating the vehicle load based on the first vehicle load value and the second vehicle load value.
    Type: Application
    Filed: August 31, 2021
    Publication date: July 28, 2022
    Applicant: Continental Automotive Systems, Inc.
    Inventors: Felix H├Ągele, Matthew Letizio, Joseph Cholag, Daniel Gregory Goodrich, Harald Schaumburg, Frank Wolters, Klaus Wenger
  • Patent number: 11394378
    Abstract: An integrated circuit comprises a power switch comprising a current path and a current sense node; and a temperature sense circuit internally coupled between the current path and the current sense node.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: July 19, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Tomas Manuel Reiter, Georg Schinner, Frank Wolter
  • Publication number: 20220165879
    Abstract: Described herein is a power semiconductor device and corresponding method of production. The semiconductor device includes: a power device region formed in a semiconductor substrate and including first trenches and second trenches extending lengthwise in parallel with one another with semiconductor mesas between adjacent ones of the trenches, each first trench including a gate electrode at a first potential and each second trench including a field plate at a second potential; and a current sense region formed in the semiconductor substrate. A subset of the first trenches, a subset of the second trenches and a subset of the semiconductor mesas are common to both the current sense region and the power device region. The second trenches are interrupted along opposite first and second sides of the current sense region such that the field plates are interrupted between the power device region and the current sense region.
    Type: Application
    Filed: November 25, 2020
    Publication date: May 26, 2022
    Inventors: Matteo Dainese, Georg Schinner, Frank Wolter
  • Patent number: 11309410
    Abstract: A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive trench of the device for the same gate potential condition.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: April 19, 2022
    Assignee: Infineon Technologies AG
    Inventors: Maria Cotorogea, Frank Wolter, Hans-Joachim Schulze, Franz-Josef Niedernostheide, Yvonne Gawlina-Schmidl
  • Publication number: 20210119006
    Abstract: In an example, a transistor device is provided. The transistor device includes a plurality of transistor cells each including a gate electrode and each at least partially integrated in a semiconductor body that includes a wide bandgap semiconductor material. The transistor device includes a gate pad arranged on top of the semiconductor body, and a plurality of gate runners each arranged on top of the semiconductor body and each connected to gate electrodes of at least some of the plurality of transistor cells. Each gate runner of the plurality of gate runners has a longitudinal direction, and at least one of the gate runners includes at least a section in which a resistivity per area increases in the longitudinal direction as a distance to the gate pad along the gate runner increases.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 22, 2021
    Inventors: Thomas AICHINGER, Wolfgang BERGNER, Ralf SIEMIENIEC, Frank WOLTER
  • Publication number: 20200295168
    Abstract: A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive trench of the device for the same gate potential condition.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Inventors: Maria Cotorogea, Frank Wolter, Hans-Joachim Schulze, Franz-Josef Niedernostheide, Yvonne Gawlina-Schmidl
  • Patent number: 10712208
    Abstract: A semiconductor die includes a single power transistor or power diode, a temperature sense diode formed close enough to the single power transistor or power diode to measure an accurate temperature. The temperature sense diode comprises first and second diodes or strings of diodes. A separate integrated circuit is operable to measure first and second voltage drops of both the first and second diodes or strings of diodes using same magnitude currents, and estimate the temperature of the single power transistor or power diode based on the difference between the first and second forward voltage drop measurements. An overall pn junction area of the first diode or string of first diodes is different from an overall pn junction area of the second diode or string of second diodes.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: July 14, 2020
    Assignee: Infineon Technologies AG
    Inventors: Andreas Kiep, Holger Ruething, Frank Wolter
  • Patent number: 10680089
    Abstract: A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive gate trench of the device for the same gate potential condition.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: June 9, 2020
    Assignee: Infineon Technologies AG
    Inventors: Maria Cotorogea, Frank Wolter, Hans-Joachim Schulze, Franz-Josef Niedernostheide, Yvonne Gawlina-Schmidl
  • Patent number: 10608104
    Abstract: A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: March 31, 2020
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Johannes Georg Laven, Christian Jaeger, Frank Wolter, Frank Pfirsch, Antonio Vellei
  • Patent number: 10600862
    Abstract: A power semiconductor device includes a semiconductor body coupled to first and second load terminals and including a drift region with dopants of a first conductivity type. An active region has at least one power cell extending at least partially into the semiconductor body, is electrically connected with the first load terminal and includes a part of the drift region. Each power cell includes a section of the drift region and is configured to conduct a load current between the terminals and to block a blocking voltage applied between the terminals. A chip edge laterally terminates the semiconductor body. A non-active termination structure arranged in between the chip edge and active region includes an ohmic layer. The ohmic layer is arranged above a surface of the semiconductor body, forms an ohmic connection between electrical potentials of the first and second load terminals, and is laterally structured along the ohmic connection.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: March 24, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Erich Griebl, Frank Wolter, Andreas Moser, Manfred Pfaffenlehner
  • Patent number: 10586793
    Abstract: A semiconductor device includes a plurality of forward conducting insulated-gate bipolar transistor cells configured to conduct a current in a forward operating mode of the semiconductor device and to block a current in a reverse operating mode of the semiconductor device. The semiconductor device also includes a plurality of reverse conducting insulated-gate bipolar transistor cells configured to conduct a current both in the forward operating mode and in the reverse operating mode. A corresponding method for operating a semiconductor device is also disclosed.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: March 10, 2020
    Assignee: Infineon Technologies AG
    Inventors: Tomas Manuel Reiter, Frank Wolter
  • Publication number: 20190319123
    Abstract: A semiconductor device is described in which a conductive channel is present along an active gate trench of the device when a gate potential is at an on-voltage, whereas no conductive channel is present along an inactive gate trench of the device for the same gate potential condition.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Inventors: Maria Cotorogea, Frank Wolter, Hans-Joachim Schulze, Franz-Josef Niedernostheide, Yvonne Gawlina-Schmidl
  • Publication number: 20190273488
    Abstract: An integrated circuit comprises a power switch comprising a current path and a current sense node; and a temperature sense circuit internally coupled between the current path and the current sense node.
    Type: Application
    Filed: March 5, 2018
    Publication date: September 5, 2019
    Inventors: Tomas Manuel Reiter, Georg Schinner, Frank Wolter
  • Patent number: 10388776
    Abstract: A semiconductor device includes: a drift region formed in a semiconductor substrate; a body region above the drift region; an active gate trench extending from a first main surface and into the body region and including a first electrode coupled to a gate potential; a source region formed in the body region adjacent to the gate trench and coupled to a source potential; a first body trench extending from the first main surface and into the body region and including a second electrode coupled to the source potential; and an inactive gate trench extending from the first main surface and into the body region and including a third electrode coupled to the gate potential. A conductive channel is present along the active gate trench when the gate potential is at an on-voltage, whereas no conductive channel is present along the inactive gate trench for the same gate potential condition.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: August 20, 2019
    Assignee: Infineon Technologies AG
    Inventors: Maria Cotorogea, Frank Wolter, Hans-Joachim Schulze, Franz-Josef Niedernostheide, Yvonne Gawlina-Schmidl
  • Publication number: 20190103480
    Abstract: A semiconductor device includes: a drift region formed in a semiconductor substrate; a body region above the drift region; an active gate trench extending from a first main surface and into the body region and including a first electrode coupled to a gate potential; a source region formed in the body region adjacent to the gate trench and coupled to a source potential; a first body trench extending from the first main surface and into the body region and including a second electrode coupled to the source potential; and an inactive gate trench extending from the first main surface and into the body region and including a third electrode coupled to the gate potential. A conductive channel is present along the active gate trench when the gate potential is at an on-voltage, whereas no conductive channel is present along the inactive gate trench for the same gate potential condition.
    Type: Application
    Filed: November 13, 2018
    Publication date: April 4, 2019
    Inventors: Maria Cotorogea, Frank Wolter, Hans-Joachim Schulze, Franz-Josef Niedernostheide, Yvonne Gawlina-Schmidl
  • Patent number: 10199291
    Abstract: A semiconductor arrangement is presented.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: February 5, 2019
    Assignee: Infineon Technologies AG
    Inventors: Andreas Riegler, Angelika Koprowski, Mathias Plappert, Frank Wolter
  • Patent number: D887648
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: June 16, 2020
    Inventor: Frank Wolters