Patents by Inventor Fuchao Wang

Fuchao Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160347610
    Abstract: An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.
    Type: Application
    Filed: August 11, 2016
    Publication date: December 1, 2016
    Inventors: Ming FANG, Fuchao WANG
  • Patent number: 9443801
    Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: September 13, 2016
    Assignee: STMicroelectronics, Inc.
    Inventors: Hai Ding, Fuchao Wang, Zhiyong Xie
  • Patent number: 9434166
    Abstract: An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: September 6, 2016
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Ming Fang, Fuchao Wang
  • Publication number: 20160197135
    Abstract: An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.
    Type: Application
    Filed: February 29, 2016
    Publication date: July 7, 2016
    Inventors: Pinghai HAO, Fuchao WANG, Duofeng YUE
  • Publication number: 20160107533
    Abstract: A mains supply method, including, upon a mains failure, detecting whether a quantity of remaining electricity of the backup mains supply system is not enough for supporting a critical load of the mains supply system to work properly for a time T; if yes, detecting whether a quantity of feedable electricity of an electric vehicle of the mains supply system is greater than zero; and if yes, controlling one or more electric vehicles that can provide feedable electricity and the backup mains supply system to jointly supply electricity to the critical load. Technical solutions provided in the embodiments of the present disclosure can keep, upon the mains failure, the critical load working as long as possible to wait for the mains to restore, that is, can improve working stability of the critical load.
    Type: Application
    Filed: December 28, 2015
    Publication date: April 21, 2016
    Inventors: Bing Cai, Fuchao Wang
  • Patent number: 9305688
    Abstract: An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.
    Type: Grant
    Filed: October 4, 2013
    Date of Patent: April 5, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: PingHai Hao, Fuchao Wang, Duofeng Yue
  • Publication number: 20160014845
    Abstract: An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range.
    Type: Application
    Filed: September 16, 2015
    Publication date: January 14, 2016
    Inventors: Fuchao WANG, Olivier LE NEEL, Ravi SHANKAR
  • Patent number: 9165853
    Abstract: An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: October 20, 2015
    Assignees: STMicroelectronics Asia Pacific Pte. Ltd., STMicroelectronics, Inc.
    Inventors: Fuchao Wang, Olivier Leneel, Ravi Shankar
  • Publication number: 20150206839
    Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.
    Type: Application
    Filed: March 30, 2015
    Publication date: July 23, 2015
    Inventors: Hai Ding, Fuchao Wang, Zhiyong Xie
  • Publication number: 20150188365
    Abstract: A electricity transmission sending device includes: a transmission circuit and a coil, where the transmission circuit includes a signal sending unit and a controlling unit, and the coil includes at least two mutually perpendicular subcoils. The signal sending unit is configured to receive a required power signal and an actually received power signal that are sent by the electricity transmission receiving device; and the controlling unit is configured to adjust a magnetic field direction in which wireless electricity transmission to the electricity transmission receiving device is performed and control the coil to transmit electric energy to the electricity transmission receiving device in an optimal magnetic field direction, where the optimal magnetic field direction refers to a corresponding magnetic field direction when a power value of electric energy actually received by the electricity transmission receiving device is maximum in a case of specific output power of the coil.
    Type: Application
    Filed: December 24, 2014
    Publication date: July 2, 2015
    Inventors: Fuchao WANG, Fan TIAN, Yuchao ZHANG
  • Patent number: 9059174
    Abstract: Methods of fabricating a multi-layer semiconductor structure are provided. In one embodiment, a method includes depositing a first dielectric layer over a semiconductor structure, depositing a first metal layer over the first dielectric layer, patterning the first metal layer to form a plurality of first metal lines, and depositing a second dielectric layer over the first metal lines and the first dielectric layer. The method also includes removing a portion of the second dielectric layer over selected first metal lines to expose a respective top surface of each of the selected first metal lines. The method further includes reducing a thickness of the selected first metal lines to be less than a thickness of the unselected first metal lines. A multi-layer semiconductor structure is also provided.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: June 16, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Hai Ding, Fuchao Wang, Zhiyong Xie
  • Publication number: 20150108105
    Abstract: An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range.
    Type: Application
    Filed: December 30, 2014
    Publication date: April 23, 2015
    Inventors: Fuchao WANG, Olivier LENEEL, Ravi SHANKAR
  • Patent number: 8927909
    Abstract: An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: January 6, 2015
    Assignees: STMicroelectronics, Inc., STMicroelectronics Asia Pacific Pte. Ltd.
    Inventors: Olivier Le Neel, Fuchao Wang, Ravi Shankar
  • Patent number: 8925835
    Abstract: A method that includes forming a chamber in a substrate, forming a silicon layer overlying the chamber, etching the silicon layer to remove selected regions and retain a selected portion overlying the chamber, the selected portion being at a location and having dimensions that correspond to a location and to dimensions of a nozzle, and forming a first metal layer adjacent to the selected portion. The method also includes forming a path in the substrate to expose the chamber concurrently with removing the selected portion of the silicon layer to expose the nozzle, the nozzle being in fluid communication with the path, the chamber, and a surrounding environment.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: January 6, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Ming Fang, Fuchao Wang
  • Publication number: 20140304990
    Abstract: An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Inventors: Ming Fang, Fuchao Wang
  • Patent number: 8798448
    Abstract: An integrated semiconductor heating assembly includes a semiconductor substrate, a chamber formed therein, and an exit port in fluid communication with the chamber, allowing fluid to exit the chamber in response to heating the chamber. The integrated heating assembly includes a first heating element adjacent the chamber, which can generate heat above a selected threshold and bias fluid in the chamber toward the exit port. A second heating element is positioned adjacent the exit port to generate heat above a selected threshold, facilitating movement of the fluid through the exit port away from the chamber. Addition of the second heating element reduces the amount of heat emitted per heating element and minimizes thickness of a heat absorption material toward an open end of the exit port. Since such material is expensive, this reduces the manufacturing cost and retail price of the assembly while improving efficiency and longevity thereof.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: August 5, 2014
    Assignee: STMicroelectronics, Inc.
    Inventors: Ming Fang, Fuchao Wang
  • Publication number: 20140184381
    Abstract: An integrated circuit contains a thin film resistor in which a body of the thin film resistor is disposed over a lower dielectric layer in a system of interconnects in the integrated circuit. Heads of the thin film resistor are disposed over electrodes which are interconnect elements in the lower dielectric layer, which provide electrical connections to a bottom surface of the thin film resistor. Top surfaces of the electrodes are substantially coplanar with a top surface of the lower dielectric layer. A top surface of the thin film resistor is free of electrical connections. An upper dielectric layer is disposed over the thin film resistor.
    Type: Application
    Filed: October 4, 2013
    Publication date: July 3, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: PingHai HAO, Fuchao WANG, Duofeng Yue
  • Patent number: 8493171
    Abstract: A trimmable resistor for use in an integrated circuit is trimmed using a heater. The heater is selectively coupled to a voltage source. The application of voltage to the heater causes the heater temperature to increase and produce heat. The heat permeates through a thermal separator to the trimmable resistor. The resistance of the trimmable resistor is permanently increased or decreased when the temperature of the resistor is increased to a value within a particular range of temperatures.
    Type: Grant
    Filed: July 3, 2012
    Date of Patent: July 23, 2013
    Assignees: STMicroelectronics, Inc., STMicroelectronics (Grenoble) SAS
    Inventors: Olivier Le Neel, Pascale Dumont-Girard, Chengyu Niu, Fuchao Wang, Michel Arnoux
  • Publication number: 20120266452
    Abstract: A trimmable resistor for use in an integrated circuit is trimmed using a heater. The heater is selectively coupled to a voltage source. The application of voltage to the heater causes the heater temperature to increase and produce heat. The heat permeates through a thermal separator to the trimmable resistor. The resistance of the trimmable resistor is permanently increased or decreased when the temperature of the resistor is increased to a value within a particular range of temperatures.
    Type: Application
    Filed: July 3, 2012
    Publication date: October 25, 2012
    Applicants: STMicroelectronics (Grenoble) SAS, STMicroelectronics, Inc.
    Inventors: Olivier Le Neel, Pascale Dumont-Girard, Chengyu Niu, Fuchao Wang, Michel Arnoux
  • Patent number: 8242876
    Abstract: A trimmable resistor for use in an integrated circuit is trimmed using a heater. The heater is selectively coupled to a voltage source. The application of voltage to the heater causes the heater temperature to increase and produce heat. The heat permeates through a thermal separator to the trimmable resistor. The resistance of the trimmable resistor is permanently increased or decreased when the temperature of the resistor is increased to a value within a particular range of temperatures.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: August 14, 2012
    Assignees: STMicroelectronics, Inc., STMicroelectronics (Grenoble) SAS
    Inventors: Olivier Le Neel, Pascale Dumont-Girard, Chengyu Niu, Fuchao Wang, Michel Arnoux