Patents by Inventor Fumihiko Matsuda

Fumihiko Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11662339
    Abstract: The present invention provides markers for judging the efficacy of therapy with a PD-1 signal inhibitor before or at an early stage of the therapy. As biomarkers for predicting or judging the efficacy of therapy with a PD-1 signal inhibitor, surrogate indicators of metabolic changes relating to mitochondrial activity in T cells and/or T cell activation in a subject are used. As such indicators, intestinal flora-related metabolites in the serum or plasma, energy metabolism-related metabolites in the serum or plasma, amino acid metabolism-related metabolites and/or derivatives thereof in the serum of plasma, oxygen consumption rate and/or ATP turnover in peripheral blood CD8+ cells, amino acids in T cells, and T-bet in peripheral blood CD8+ cells may be used.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: May 30, 2023
    Assignee: Kyoto University
    Inventors: Tasuku Honjo, Kenji Chamoto, Fumihiko Matsuda, Yasushi Okuno, Sidonia Fagarasan
  • Patent number: 11564313
    Abstract: A wiring body includes: a core insulating base material having a first main surface and a second main surface; a signal line and a first power supply line provided on the first main surface; a second power supply line provided on the second main surface and electrically connected to the first power supply line; a first dielectric layer laminated on the first main surface so as to embed the signal line and the first power supply line; a first ground layer provided on the first dielectric layer; a second dielectric layer laminated on the second main surface so as to embed the second power supply line; and a second ground layer provided on the second dielectric layer and sandwiching at least the signal line together with the first ground layer.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: January 24, 2023
    Assignee: NIPPON MEKTRON, LTD.
    Inventor: Fumihiko Matsuda
  • Patent number: 11491117
    Abstract: The disclosure pertains to a compound of formula (I), one of its pharmaceutically acceptable salts, or a composition comprising thereof, for use in the prevention or treatment of glucose intolerance related conditions, insulin deficit related conditions, nonalcoholic fatty liver disease and/or obesity.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: November 8, 2022
    Assignees: SORBONNE UNIVERSITÉ, INSTITUT NATIONAL DE LA SANTE ET DE LA RECHERCHE MEDICALE (INSERM), ASSISTANCE PUBLIQUE—HÔPITAUX DE PARIS, KYOTO UNIVERSITY
    Inventors: Dominique Gauguier, Fumihiko Matsuda, François Brial
  • Publication number: 20220082554
    Abstract: A marker for judging the efficacy of therapy with a PD-1 signal inhibitor-containing drug before or at an early stage of the therapy is provided.
    Type: Application
    Filed: November 28, 2019
    Publication date: March 17, 2022
    Applicant: Kyoto University
    Inventors: Tasuku Honjo, Kenji Chamoto, Fumihiko Matsuda
  • Publication number: 20220053636
    Abstract: A wiring body includes: a core insulating base material having a first main surface and a second main surface; a signal line and a first power supply line provided on the first main surface; a second power supply line provided on the second main surface and electrically connected to the first power supply line; a first dielectric layer laminated on the first main surface so as to embed the signal line and the first power supply line; a first ground layer provided on the first dielectric layer; a second dielectric layer laminated on the second main surface so as to embed the second power supply line; and a second ground layer provided on the second dielectric layer and sandwiching at least the signal line together with the first ground layer.
    Type: Application
    Filed: May 17, 2021
    Publication date: February 17, 2022
    Applicant: NIPPON MEKTRON, LTD.
    Inventor: Fumihiko MATSUDA
  • Patent number: 11219123
    Abstract: Provided is a printed circuit board which includes: a first dielectric layer including a first principal surface and a second principal surface on a side opposite to the first principal surface; a first adhesive layer formed on the first principal surface; a first metal foil pattern formed on the first adhesive layer and forming a signal line; and a second metal foil pattern formed on the second principal surface and forming a ground layer, in which the first metal foil pattern has a higher specific conductivity than a specific conductivity of the second metal foil pattern.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: January 4, 2022
    Assignee: NIPPON MEKTRON, LTD.
    Inventors: Fumihiko Matsuda, Yoshihiko Narisawa, Kenji Kumagai, Daisuke Shiokawa, Yuki Ogi, Akihiko Toyoshima, Masami Uchino, Isao Arase, Hiroshi Takeuchi
  • Patent number: 11137437
    Abstract: Provided is a probe device used for electrical inspection of a printed wiring board, the probe device including at least one probe group including a plurality of wire probes configured to be able to simultaneously abut against a wire provided on the printed wiring board and extending in a specified direction, the plurality of wire probes abutting against the wire along the direction and being electrically connected to each other.
    Type: Grant
    Filed: October 30, 2019
    Date of Patent: October 5, 2021
    Assignee: NIPPON MEKTRON, LTD.
    Inventors: Shoji Takano, Fumihiko Matsuda, Yoshihiko Narisawa
  • Publication number: 20210282263
    Abstract: Provided is a printed circuit board which includes: a first dielectric layer including a first principal surface and a second principal surface on a side opposite to the first principal surface; a first adhesive layer formed on the first principal surface; a first metal foil pattern formed on the first adhesive layer and forming a signal line; and a second metal foil pattern formed on the second principal surface and forming a ground layer, in which the first metal foil pattern has a higher specific conductivity than a specific conductivity of the second metal foil pattern.
    Type: Application
    Filed: February 10, 2021
    Publication date: September 9, 2021
    Applicant: NIPPON MEKTRON, LTD.
    Inventors: Fumihiko MATSUDA, Yoshihiko NARISAWA, Kenji KUMAGAI, Daisuke SHIOKAWA, Yuki OGI, Akihiko TOYOSHIMA, Masami UCHINO, Isao ARASE, Hiroshi TAKEUCHI
  • Publication number: 20200355697
    Abstract: Provided is a method for identifying proteins capable of increasing the number of identified proteins contained in a target sample derived from blood. A protein contained in the target sample derived from blood is fragmented, and a protein contained in an having less bias in a quantity ratio of proteins than the target sample is fragmented, and the fragmented proteins are mixed (Steps S101 to S103). In this manner, the mixed sample in which the bias in a quantity ratio of proteins is less than that of the target sample is generated. By performing MS/MS measurement using the generated mixed sample (Step S107), an MS/MS spectrum of a peak derived from a protein contained in a small amount in the target sample can be prevented from being missed. Accordingly, the number of identified proteins contained in the target sample derived from blood can be increased.
    Type: Application
    Filed: January 9, 2018
    Publication date: November 12, 2020
    Applicant: SHIMADZU CORPORATION
    Inventors: Kazuhiro SONOMURA, Taka-Aki SATO, Fumihiko MATSUDA, Yi-Ting WANG, Yasushi ISHIHAMA, Chia-Feng TSAI
  • Patent number: 10779394
    Abstract: The invention provides a method of manufacturing a printed circuit board. The printed circuit board (100) has a conductor layer (ground layer (70)), a signal layer (25) having a signal line (20) provided so as to oppose the conductor layer (ground layer (70)), and an insulating resin layer (60) disposed between the conductor layer (ground layer (70)) and the signal layer (25), the insulating resin layer (60) has voids in an overlapping location, in a plan view, with the signal line (20), and the voids (40) are communicated with the outside of the printed circuit board (100).
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: September 15, 2020
    Assignee: NIPPON MEKTRON, LTD.
    Inventor: Fumihiko Matsuda
  • Patent number: 10765000
    Abstract: A method for manufacturing a multilayer printed circuit board includes: preparing a first wiring substrate having a first insulating resin film having a first circuit pattern formed on a first main surface, and a first protective film releasably bonded to a second main surface; partially removing the first protective film and the first insulating resin film to form a bottomed via hole having the first circuit pattern exposed on a bottom surface; filling the bottomed via hole with a conductive paste; disposing a second protective film on the first protective film to cover the bottomed via hole filled with the conductive paste; removing an unnecessary portion of the first wiring substrate after the second protective film is disposed on the first protective film; and peeling off the first protective film and the second protective film from the first wiring substrate after the unnecessary portion is removed.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: September 1, 2020
    Assignee: NIPPON MEKTRON, LTD.
    Inventors: Fumihiko Matsuda, Shoji Takano
  • Publication number: 20200253889
    Abstract: The invention pertains to a compound of formula (I), one of its pharmaceutically acceptable salts, or a composition comprising thereof, for use in the prevention or treatment of glucose intolerance related conditions, insulin deficit related conditions, nonalcoholic fatty liver disease and/or obesity.
    Type: Application
    Filed: October 4, 2018
    Publication date: August 13, 2020
    Applicants: SORBONNE UNIVERSITÉ, INSTITUT NATIONAL DE LA SANTE ET DE LA RECHERCHE MEDICALE (INSERM), ASSISTANCE PUBLIQUE - HÔPITAUX DE PARIS, KYOTO UNIVERSITY
    Inventors: Dominique Gauguier, Fumihiko Matsuda, François Brial
  • Patent number: 10736208
    Abstract: A printed wiring board 1 for high frequency transmission according to an embodiment of the present invention includes: an insulating base material 10; a signal line 21 extending in a longitudinal direction of the insulating base material 10; ground wirings 31, 32 extending in the longitudinal direction while being spaced apart from the signal line 21 by a predetermined distance; a ground layer 40 formed on a major surface 10b; a plurality of ground connection vias 51 electrically connecting the ground wiring 31 and the ground layer 40; and a plurality of ground connection vias 52 electrically connecting the ground wiring 32 and the ground layer 40. A width of the ground wirings 31, 32 is smaller than a land diameter of the ground connection vias 51, 52. Then, the ground connection vias 51 and the ground connection vias 52 are arranged not to overlap each other in a width direction perpendicular to the longitudinal direction throughout a cable portion 90.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: August 4, 2020
    Assignee: NIPPON MEKTRON, LTD.
    Inventors: Shoji Takano, Yoshihiko Narisawa, Fumihiko Matsuda
  • Publication number: 20200166564
    Abstract: Provided is a probe device used for electrical inspection of a printed wiring board, the probe device including at least one probe group including a plurality of wire probes configured to be able to simultaneously abut against a wire provided on the printed wiring board and extending in a specified direction, the plurality of wire probes abutting against the wire along the direction and being electrically connected to each other.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 28, 2020
    Inventors: Shoji TAKANO, Fumihiko MATSUDA, Yoshihiko NARISAWA
  • Publication number: 20200037443
    Abstract: Provided is a method for manufacturing a multilayer printed circuit board includes: S1) preparing a first wiring substrate having a first insulating resin film having a first main surface and a second main surface opposite to the first main surface, a first circuit pattern formed on the first main surface, and a first protective film releasably bonded to the second main surface; S2) partially removing the first protective film and the first insulating resin film to form a bottomed via hole having the first circuit pattern exposed on a bottom surface; S3) filling the bottomed via hole with a conductive paste; S4) disposing a second protective film on the first protective film to cover the bottomed via hole filled with the conductive paste; S5) removing an unnecessary portion of the first wiring substrate after the second protective film is disposed on the first protective film; S6) peeling off the first protective film and the second protective film from the first wiring substrate after the unnecessary portion
    Type: Application
    Filed: June 19, 2019
    Publication date: January 30, 2020
    Applicant: NIPPON MEKTRON, LTD.
    Inventors: Fumihiko MATSUDA, Shoji TAKANO
  • Publication number: 20200015351
    Abstract: A printed wiring board 1 for high frequency transmission according to an embodiment of the present invention includes: an insulating base material 10; a signal line 21 extending in a longitudinal direction of the insulating base material 10; ground wirings 31, 32 extending in the longitudinal direction while being spaced apart from the signal line 21 by a predetermined distance; a ground layer 40 formed on a major surface 10b; a plurality of ground connection vias 51 electrically connecting the ground wiring 31 and the ground layer 40; and a plurality of ground connection vias 52 electrically connecting the ground wiring 32 and the ground layer 40. A width of the ground wirings 31, 32 is smaller than a land diameter of the ground connection vias 51, 52. Then, the ground connection vias 51 and the ground connection vias 52 are arranged not to overlap each other in a width direction perpendicular to the longitudinal direction throughout a cable portion 90.
    Type: Application
    Filed: November 22, 2018
    Publication date: January 9, 2020
    Applicant: NIPPON MEKTRON, LTD.
    Inventors: Shoji TAKANO, Yoshihiko NARISAWA, Fumihiko MATSUDA
  • Publication number: 20190367983
    Abstract: The present invention provides an HLA gene amplification primer set containing a primer consisting of each base sequence shown in SEQ ID NO: 1-16. It also provides a highly efficient and highly uniform sequencing method using the primer set.
    Type: Application
    Filed: February 9, 2018
    Publication date: December 5, 2019
    Inventors: Fumihiko Matsuda, Shuji Kawaguchi, Masakazu Shimizu, Koichiro Higasa
  • Publication number: 20190316199
    Abstract: The present invention provides a test method and an evaluation kit for determining the risk of antithyroid drug-induced agranulocytosis. More particularly, it provides a test method for determining the risk of antithyroid drug-induced agranulocytosis, including testing susceptibility polymorphism to antithyroid drug-induced agranulocytosis, and determining the risk of antithyroid drug-induced agranulocytosis, and an evaluation kit for the risk of antithyroid drug-induced agranulocytosis, containing a polynucleotide capable of detecting susceptibility polymorphism to antithyroid drug-induced agranulocytosis.
    Type: Application
    Filed: December 3, 2018
    Publication date: October 17, 2019
    Inventors: Fumihiko Matsuda, Chikashi Terao, Takashi Akamizu, Hiroshi Yoshimura, Akira Miyauchi
  • Patent number: 10383224
    Abstract: [Problem] To allow an efficient sheet layout of a flexible printed circuit board having a plurality of cable sections extending in different directions and to improve a yield.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: August 13, 2019
    Assignee: NIPPON MEKTRON, LTD.
    Inventor: Fumihiko Matsuda
  • Patent number: 10321578
    Abstract: A filling method of conductive paste includes a step of providing a protective film on a principal surface of a metal foil clad laminated sheet, a step of forming bottomed via holes, a step of removing the film from a surface to a midway thereof to form a conductive paste flowing groove having the via holes, a step of disposing a housing member on the film, and thereby, causing a conductive paste injecting channel and a vacuum evacuating channel to communicate with a conductive paste flowing space S, a step of depressurizing the space S via the channel, and a step of injecting conductive paste into the space S via the channel, and thereby, filling an inside of the via holes with the conductive paste.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: June 11, 2019
    Assignee: NIPPON MEKTRON, LTD.
    Inventors: Shoji Takano, Fumihiko Matsuda