Abstract: A mounting structure includes: a surface mounting connector including a housing and a plurality of terminals; a substrate including a plurality of lands, each of which is electrically connected to the terminal with a bonding member; a plurality of support portions for supporting the connector on the substrate; and a plurality of fixing members for positioning the connector on the substrate. Each fixing member is connected to the housing, and contacts a part of the substrate, which is different from a surface portion of the substrate contacting the support portion. Each terminal is positioned on the substrate with a predetermined distance between the terminal and the substrate by the support portions and the fixing members.

Abstract: A mounting structure includes: a surface mounting connector including a housing and a plurality of terminals; a substrate including a plurality of lands, each of which is electrically connected to the terminal with a bonding member; a plurality of support portions for supporting the connector on the substrate; and a plurality of fixing members for positioning the connector on the substrate. Each fixing member is connected to the housing, and contacts a part of the substrate, which is different from a surface portion of the substrate contacting the support portion. Each terminal is positioned on the substrate with a predetermined distance between the terminal and the substrate by the support portions and the fixing members.

Abstract: A sensing element is formed on a silicon (Si) substrate and covered with a cap. The cap has a leg portion having a titanium layer and a gold layer formed in that order on the lower surface thereof. The silicon substrate has an Si bonding frame at a position corresponding to the leg portion. When bonding the Si bonding frame of the silicon substrate and the leg portion of the cap, the titanium layer deoxidizes a naturally oxidized silicon layer formed on the Si bonding frame, whereby the silicon substrate and the cap can be uniformly bonded together with an Au/Si eutectic portion interposed therebetween. In this case, the Au/Si eutectic portion includes a titanium oxide accompanying the deoxidization of the naturally oxidized silicon layer.

Abstract: A semiconductor device which improves heat radiation performance and realizes size reduction and enables heat to be radiated swiftly from both of the principal surfaces of a semiconductor chip even when the semiconductor chip has a construction vulnerable to stresses. It comprises several IGBT chips each having a collector electrode on one principal surface and an emitter electrode and a gate electrode on the other principal surface and two high thermal conductivity insulating substrates sandwiching these IGBT chips and having electrode patterns for bonding to the electrodes of the IGBT chips disposed on their sandwiching surfaces, the electrodes of the IGBT chips and the electrode patterns of the high thermal conductivity insulating substrates being bonded by brazing.

Abstract: A semiconductor device which improves heat radiation performance and realizes size reduction and enables heat to be radiated swiftly from both of the principal surfaces of a semiconductor chip even when the semiconductor chip has a construction vulnerable to stresses. It comprises several IGBT chips each having a collector electrode on one principal surface and an emitter electrode and a gate electrode on the other principal surface and two high thermal conductivity insulating substrates sandwiching these IGBT chips and having electrode patterns for bonding to the electrodes of the IGBT chips disposed on their sandwiching surfaces, the electrodes of the IGBT chips and the electrode patterns of the high thermal conductivity insulating substrates being bonded by brazing.

Abstract: A semiconductor wafer, which can be divided into chips at a high yield and a low cost and easily handled during transfer thereof as well, is disclosed. In a semiconductor wafer of such structure that structures with a low mechanical strength, such as suspended microstructures, are exposed at a surface thereof, detachable adhesive sheet making up protective caps for the respective suspended microstructures are formed over the semiconductor wafer. By means of this, even if the semiconductor wafer is diced into the individual chips, respective microstructures on chips are protected from the external force, such as the pressure of cutting water, during the dicing process.

Abstract: On a silicon wafer there is formed a movable gate MOS transistor (sensing element: functional element). A bonding frame consisting of a silicon thin film is patterned around an element formation region on the surface of the silicon wafer. On a cap forming silicon wafer there is projectively provided a leg portion on the bottom surface of which a bonding layer consisting of a gold film is formed. The cap forming silicon wafer is disposed on the silicon wafer, whereupon heating with respect thereto is performed at a temperature equal to higher than a gold/silicon eutectic temperature to thereby make bondage between the bonding frame of the silicon wafer and the bonding layer of the cap forming silicon wafer. Thereafter, the both wafers are diced in chip units.

Abstract: A device protecting film having a UV transmissible SiN film, wherein the film is formed by a plasma CVD process in such a manner that a composition ratio Si/N falls within the range of 0.75 to 0.87, a Si--H bond concentration Z (cm.sup.-3) in the SiN film has a value near the value Z expressed by the following formula in accordance with a value X of Si/N:Z=1.58.times.10.sup.22 X-9.94.times.10.sup.21and, at the same time, a hydrogen bond concentration Y (cm.sup.-3) determining the Si--H bond concentration has a value near the value Y expressed by the following formula in accordance with X:Y=1.01.times.10.sup.22 X+0.54.times.10.sup.22The resulting SiN film transmits ultraviolet rays having a wavelength of 254 nm, reduces a stress inside the film, and has high moisture resistance.

Abstract: A zinc oxide-based transparent conductive film containing of gallium or indium and having a resistivity of not more than 10.sup.-3 .OMEGA..cm is provided by evaporating a source of zinc oxide containing 0.5 to 5% by weight of gallium oxide or 0.3 to 4.5% by weight of indium oxide and depositing same onto a substrate after activating the vapor of the source by a plasma.

Abstract: Semiconductor chips are mounted in a supporting semiconductor substrate, with matching anisotropic (crystal plane) faces on the chips and substrate. The chips may extend above the substrate to facilitate connection together.