Patents by Inventor Fumitaka Asami

Fumitaka Asami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7705806
    Abstract: A method for driving a plasma display panel, including a plurality of display electrode pairs and a plurality of address electrodes, and which includes at least an address period and a sustain discharge period. In the address period, performing address processing, between the address electrodes and a display electrode configured as either a set of odd or even numbered display electrodes, sequentially to all of one of the sets of display electrode pairs, and thereafter address processing, between the address electrodes and a display electrode configured as the other set of display electrode pairs, sequentially to all of the other set of display electrode pairs. In the sustain discharge period, supplying at least one first sustain discharge pulse to the one set of display electrode pairs, and supplying at least one second sustain discharge pulse to the other set of display electrode pairs.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 27, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20060050094
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Application
    Filed: October 31, 2005
    Publication date: March 9, 2006
    Applicant: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Patent number: 7002535
    Abstract: A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
    Type: Grant
    Filed: June 14, 2004
    Date of Patent: February 21, 2006
    Assignees: Hitachi, Ltd., Fujitsu Limited
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Patent number: 6965359
    Abstract: Method for driving a plasma display panel. At least one first discharge sustaining pulse is applied to a first pair of display electrodes, and at least one second discharge sustaining pulse applied to an adjacent pair of display electrodes. The first and second discharge sustaining pulses are applied such that they are in the same phase as one another and/or such that a current in the first pair of display electrodes flows in the opposite direction from a current in the adjacent pair of display electrodes.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: November 15, 2005
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20050168410
    Abstract: A first signal line (OUTA) supplies a first electric potential to a terminal of an X-side of a load (20) through a switch (SW4). A second signal line (OUTB) supplies a second electric potential to the terminal of the X-side of the load (20) through a switch (SW5). Coil circuits (A and B) are connected between the first signal line (OUTA) and the second signal line (OUTB) and a ground. Furthermore, each of the coil circuits (A and B) is a circuit configured with, for example, a coil and a diode, and the coil is connected so as to carry out L-C resonance with the load (20) through the switches (SW4 and SW5).
    Type: Application
    Filed: April 1, 2005
    Publication date: August 4, 2005
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Shigetoshi Tomio, Tomokatsu Kishi, Katsumi Itoh, Tetsuya Sakamoto, Fumitaka Asami
  • Publication number: 20040257309
    Abstract: A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
    Type: Application
    Filed: June 14, 2004
    Publication date: December 23, 2004
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Naboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Patent number: 6781564
    Abstract: A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: August 24, 2004
    Assignees: Hitachi, Ltd., Fujitsu Limited
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Patent number: 6636187
    Abstract: A display has a panel, and first and second electrodes. The first and second electrodes define a matrix of cells on the panel. The second electrodes, which correspond to lines of the cells, are scanned to select the cell lines one by one. The first electrodes are driven to set display data for a selected one of the cell lines. The display also has a sequence setting unit for setting sequences of scanning the second electrodes, and a sequence selection unit for selecting one of the sequences that minimizes the current and power consumption of a first-electrode driver without deteriorating the quality of the displayed images.
    Type: Grant
    Filed: October 29, 1998
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Limited
    Inventors: Masaya Tajima, Junichi Okayasu, Kiyoshi Takata, Katsuhiro Ishida, Takashi Fujisaki, Yoshimasa Awata, Nobuyoshi Kondo, Shinsuke Tanaka, Naoki Matsui, Fumitaka Asami
  • Patent number: 6636000
    Abstract: A plasma display device has a pair of substrates having electrodes and terminals provided at ends of the electrodes. Driving circuits supply a driving voltage to the electrodes via flexible printed circuit boards to emit light. Connectors are detachably attached to the substrate. The connector includes a housing and terminal members disposed in the housing, with the terminal member having a U-shaped cross-sectional shape, so that a first portion as one leg of the “U” contacts the terminal of the electrode and a second portion as another leg of the “U” contacts the conductor of the flexible connecting member. The terminals of the electrodes are arranged in a staggered manner at the end of the substrate.
    Type: Grant
    Filed: August 15, 2001
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Fumitaka Asami, Tadao Miyasaka, Kazuyuki Harada, Masatoshi Hira, Norio Matsumoto
  • Publication number: 20030122737
    Abstract: A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.
    Type: Application
    Filed: December 17, 2002
    Publication date: July 3, 2003
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Patent number: 6531995
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: March 11, 2003
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Patent number: 6496166
    Abstract: As is obvious from the description in the specification and the attached drawings, the present invention provides a display apparatus for displaying an image on a display panel by turning on pixels of said display panel, said display apparatus comprising: a display panel provided with: address electrodes driven by address pulses based on a video input signal; and sustain electrodes crossing said address electrodes and sandwiching electrical discharging units of pixels with said address electrodes and driven by sustain pulses; a sustain-electrode drive circuit for generating said sustain pulses and scan pulses, provided with a common circuit for generating said sustain pulses or said scan pulses in response to an operating state thereof and for supplying said scan pulses and said sustain pulses to said sustain electrodes.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: December 17, 2002
    Assignees: Hitachi, Ltd., Fujitsu Limited
    Inventors: Makoto Onozawa, Yuji Sano, Michitaka Ohsawa, Takashi Sasaki, Noboru Akiyama, Fumitaka Asami, Kazuo Yoshiikawa, Hitoshi Hirakawa, Tomokatsu Kishi, Toyoshi Kawada
  • Patent number: 6373452
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: April 16, 2002
    Assignee: Fujiitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20020041155
    Abstract: A plasma display device has a pair of substrates having electrodes and terminals provided at ends of the electrodes. Driving circuits supply a driving voltage to the electrodes via flexible printed circuit boards to emit light. Connectors are detachably attached to the substrate. The connector includes a housing and terminal members disposed in the housing, with the terminal member having a U-shaped cross-sectional shape, so that a first portion as one leg of the “U” contacts the terminal of the electrode and a second portion as another leg of the “U” contacts the conductor of the flexible connecting member. The terminals of the electrodes are arranged in a staggered manner at the end of the substrate.
    Type: Application
    Filed: August 15, 2001
    Publication date: April 11, 2002
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Fumitaka Asami, Tadao Miyasaka, Kazuyuki Harada, Masatoshi Hira, Norio Matsumoto
  • Publication number: 20020021265
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Application
    Filed: September 28, 2001
    Publication date: February 21, 2002
    Applicant: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20010040536
    Abstract: A display has a panel, and first and second electrodes. The first and second electrodes define a matrix of cells on the panel. The second electrodes, which correspond to lines of the cells, are scanned to select the cell lines one by one. The first electrodes are driven to set display data for a selected one of the cell lines. The display also has a sequence setting unit for setting sequences of scanning the second electrodes, and a sequence selection unit for selecting one of the sequences that minimizes the current and power consumption of a first-electrode driver without deteriorating the quality of the displayed images.
    Type: Application
    Filed: October 29, 1998
    Publication date: November 15, 2001
    Inventors: MASAYA TAJIMA, JUNICHI OKAYASU, KIYOSHI TAKATA, KATSUHIRO ISHIDA, TAKASHI FUJISAKI, YOSHIMASA AWATA, NOBUYOSHI KONDO, SHINSUKE TANAKA, NAOKI MATSUI, FUMITAKA ASAMI
  • Patent number: 6144348
    Abstract: A plasma display panel and driving method thereof perform addressing at a high speed and a low voltage without deteriorating contrast. Priming electrodes forming priming cells are located outside but adjacent a display area. Glow occurring in the priming cells is intercepted. When priming discharge is induced at a reset step, voltages lower than a discharge start voltage are applied to first (X) and second (Y) electrodes and third (address) electrodes respectively. Despite the voltages being lower than the discharge start voltage, once discharge is induced in the priming cells, discharge starts in adjoining cells. The discharge then spreads successively over all the cells, thus inducing discharge in all the cells. Consequently, wall charge is produced in all the cells.
    Type: Grant
    Filed: August 5, 1997
    Date of Patent: November 7, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kanazawa, Fumitaka Asami
  • Patent number: 6144349
    Abstract: The present invention relates to a plasma display device which limits a generation of electromagnetic wave. The plasma display device has first and second drive circuits for applying a drive voltage to first and second display electrode pair. Further, a direction of a charge current flowing at said first display electrode pair when said drive voltage is applied by said first drive circuit is opposite on said plasma display panel to a direction of a charge current flowing at said second display electrode pair when said drive voltage is applied by said second drive circuit. According to the present invention, a transitional charge/discharge current, which is generated upon the application of a drive voltage to one of the display electrodes, and a light emission discharge current flow in opposite directions on the panel. Thus, electromagnetic waves that are generated by the inductances of the display electrode pair cancel each other out.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: November 7, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshimasa Awata, Naoki Matsui, Kenji Awamoto, Yoshikazu Kanazawa, Shigetoshi Tomio, Fumitaka Asami, Masaya Tajima, Hideki Isohata, Junichi Okayasu, Kiyoshi Takata, Takashi Fujisaki
  • Patent number: 5898414
    Abstract: A display apparatus permitting high resolution and a large number of gray-scale levels and causing indiscernible flicker has been disclosed. One frame is divided into or composed of j subframes, and light is produced according to a luminance level predetermined subframe by subframe in order to express intermediate gray-scale of a picture. Emphasis is put on the fact that display to be performed during each subframe within one frame can be controlled independently. An interlaced-scanning display is carried out during k subframes associated with low-order weighted bits out of j subframes, and a noninterlaced-scanning display is carried out during the other j-k subframes associated with high-order weighted bits. The ratio of an addressing scan time to a subframe associated with a small weight is large, and the ratio of an addressing scan time to a whole frame is very large. If the addressing scan time can be reduced as mentioned above, a great effect would be exerted.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: April 27, 1999
    Assignee: Fujitsu Limited
    Inventors: Kenji Awamoto, Naoki Matsui, Tadatsugu Hirose, Fumitaka Asami
  • Patent number: 5680064
    Abstract: A first level converter is provided with an input transistor circuit and an output transistor circuit. The input transistor circuit is supplied with power from a first power source and outputs a complementary signal on the basis of an input signal. The output transistor circuit is supplied with power from a second power source, and amplifies and outputs the complementary signal. A second level converter is provided with a pulse generating circuit and a signal output circuit. The pulse generating circuit is supplied with power from the first driving power source, and generates a one-shot pulse signal. The signal output circuit is supplied with power from the second driving power source, latches the one-shot pulse signal and outputs the signal. The semiconductor integrated circuit is provided with a first circuit system, a level conversion circuit and a second circuit system. The first circuit system is driven by being supplied with power from the first driving power source.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: October 21, 1997
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Satoru Masaki, Akinori Yamamoto, Fusao Seki, Fumitaka Asami, Kazuo Ohno, Masao Imai, Shinya Udo