Patents by Inventor Fumitoshi Nakanata

Fumitoshi Nakanata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4942373
    Abstract: Multi-layered, thick/thin film, nanosecond delay lines, the inductive/capacitive characteristics of which are tailored to provide line impedances yielding unit delays of 1 to 10 nanoseconds. The delay lines are constructed on a supporting ceramic, resin/fiber or plastic substrate. In alternative embodiments, a serpentine conductive layer of tailored line widths and conductor spacings is sandwiched relative to overlying dielectric layers of 25 to 200 microns thickness and associated ground plane layers. In another embodiment, multiple conductor layers are sandwiched relative to intervening dielectric and ground plane layers. Lateral contact pads/pins, vertical vias and jumper conductors permit circuit connection and interconnection of the layers.
    Type: Grant
    Filed: April 11, 1988
    Date of Patent: July 17, 1990
    Assignee: Thin Film Technology Corporation
    Inventors: Paul Ozawa, Mark Brooks, Fumitoshi Nakanata