Patents by Inventor Futoshi Komatsu

Futoshi Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230387219
    Abstract: A method of manufacturing a semiconductor device includes: forming a silicon oxide film covering each of a first main surface and a second main surface of a semiconductor substrate; forming a redistribution wiring on the first main surface side of the semiconductor substrate; and grinding the second main surface of the semiconductor substrate. This grinding step is performed in a state in which a thickness of the silicon oxide film positioned on the second main surface is equal to or larger than 10 nm and equal to or smaller than 30 nm.
    Type: Application
    Filed: March 16, 2023
    Publication date: November 30, 2023
    Inventors: Futoshi KOMATSU, Tomoo NAKAYAMA, Katsuhiro UCHIMURA, Hiroshi INAGAWA
  • Patent number: 10818813
    Abstract: In order to improve the performance of a semiconductor device, a semiconductor layer EP is formed over a p-type semiconductor PR. An n-type semiconductor layer NR1 is formed over the semiconductor layer EP. The semiconductor layer PR, the semiconductor layer EP, and the semiconductor layer NR1 respectively configure part of a photoreceiver. A cap layer of a material different from that of the semiconductor layer EP is formed over the semiconductor layer EP, and a silicide layer, which is a reaction product of a metal and the material included in the cap layer, is formed within the cap layer. A plug having a barrier metal film BM1 is formed over the cap layer through the silicide layer. Here, a reaction product of the metal and the material included in the semiconductor layer NR1 is not formed within the semiconductor layer NR1.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: October 27, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tomoo Nakayama, Shinichi Watanuki, Futoshi Komatsu, Teruhiro Kuwajima, Takashi Ogura, Hiroyuki Okuaki, Shigeaki Shimizu
  • Patent number: 10553734
    Abstract: An improvement is achieved in the reliability of a semiconductor device. Over an insulating layer, an optical waveguide and a p-type semiconductor portion are formed. Over the p-type semiconductor portion, a multi-layer body including an n-type semiconductor portion and a cap layer is formed. Over a first interlayer insulating film covering the optical waveguide, the p-type semiconductor portion, and the multi-layer body, a heater located over the optical waveguide is formed. In the first interlayer insulating film, first and second contact holes are formed. A first contact portion electrically coupled with the p-type semiconductor portion is formed continuously in the first contact hole and over the first interlayer insulating film. A second contact portion electrically coupled with the cap layer is formed continuously in the second contact hole and over the first interlayer insulating film.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: February 4, 2020
    Assignee: Renesas Electronics Corporation
    Inventors: Teruhiro Kuwajima, Shinichi Watanuki, Futoshi Komatsu, Tomoo Nakayama
  • Patent number: 10355161
    Abstract: To achieve a high-reliability germanium photoreceiver. A photoreceiver portion of a germanium photoreceiver comprised of a p type silicon core layer, an i type germanium layer, and an n type silicon layer is covered with a second insulating film and from a coupling hole formed in the second insulating film, a portion of the upper surface of the photoreceiver portion is exposed. The coupling hole has, on the inner wall thereof, a barrier metal film and the barrier metal film has thereon a first-layer wiring made of a tungsten film. Tungsten hardly diffuses from the tungsten film into the i type germanium layer even when a thermal stress is applied, making it possible to prevent the resulting germanium photoreceiver from having diode characteristics deteriorated by the thermal stress.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: July 16, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Teruhiro Kuwajima, Shinichi Watanuki, Futoshi Komatsu, Tomoo Nakayama
  • Publication number: 20190198703
    Abstract: In order to improve the performance of a semiconductor device, a semiconductor layer EP is formed over a p-type semiconductor PR. An n-type semiconductor layer NR1 is formed over the semiconductor layer EP. The semiconductor layer PR, the semiconductor layer EP, and the semiconductor layer NR1 respectively configure part of a photoreceiver. A cap layer of a material different from that of the semiconductor layer EP is formed over the semiconductor layer EP, and a silicide layer, which is a reaction product of a metal and the material included in the cap layer, is formed within the cap layer. A plug having a barrier metal film BM1 is formed over the cap layer through the silicide layer. Here, a reaction product of the metal and the material included in the semiconductor layer NR1 is not formed within the semiconductor layer NR1.
    Type: Application
    Filed: November 13, 2018
    Publication date: June 27, 2019
    Inventors: Tomoo NAKAYAMA, Shinichi WATANUKI, Futoshi KOMATSU, Teruhiro KUWAJIMA, Takashi OGURA, Hiroyuki OKUAKI, Shigeaki SHIMIZU
  • Patent number: 10211352
    Abstract: Germanium (Ge) contamination to a semiconductor manufacturing apparatus is suppressed. Germanium is a dissimilar material in a silicon semiconductor process. A semiconductor device is provided with a Ge photodiode including an n-type germanium layer, and a plug capacitively coupled to the n-type germanium layer. In other words, the n-type germanium layer of the Ge photodiode and the plug are not in direct contact with each other but are capacitively coupled to each other.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: February 19, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Shinichi Watanuki, Futoshi Komatsu, Tomoo Nakayama, Takashi Ogura, Teruhiro Kuwajima
  • Publication number: 20190006535
    Abstract: An improvement is achieved in the reliability of a semiconductor device. Over an insulating layer, an optical waveguide and a p-type semiconductor portion are formed. Over the p-type semiconductor portion, a multi-layer body including an n-type semiconductor portion and a cap layer is formed. Over a first interlayer insulating film covering the optical waveguide, the p-type semiconductor portion, and the multi-layer body, a heater located over the optical waveguide is formed. In the first interlayer insulating film, first and second contact holes are formed. A first contact portion electrically coupled with the p-type semiconductor portion is formed continuously in the first contact hole and over the first interlayer insulating film. A second contact portion electrically coupled with the cap layer is formed continuously in the second contact hole and over the first interlayer insulating film.
    Type: Application
    Filed: May 15, 2018
    Publication date: January 3, 2019
    Inventors: Teruhiro KUWAJIMA, Shinichi WATANUKI, Futoshi KOMATSU, Tomoo NAKAYAMA
  • Publication number: 20180138325
    Abstract: Germanium (Ge) contamination to a semiconductor manufacturing apparatus is suppressed. Germanium is a dissimilar material in a silicon semiconductor process. A semiconductor device is provided with a Ge photodiode including an n-type germanium layer, and a plug capacitively coupled to the n-type germanium layer. In other words, the n-type germanium layer of the Ge photodiode and the plug are not in direct contact with each other but are capacitively coupled to each other.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 17, 2018
    Applicant: Renesas Electronics Corporation
    Inventors: Shinichi WATANUKI, Futoshi KOMATSU, Tomoo NAKAYAMA, Takashi OGURA, Teruhiro KUWAJIMA
  • Publication number: 20180083154
    Abstract: To achieve a high-reliability germanium photoreceiver. A photoreceiver portion of a germanium photoreceiver comprised of a p type silicon core layer, an i type germanium layer, and an n type silicon layer is covered with a second insulating film and from a coupling hole formed in the second insulating film, a portion of the upper surface of the photoreceiver portion is exposed. The coupling hole has, on the inner wall thereof, a barrier metal film and the barrier metal film has thereon a first-layer wiring made of a tungsten film. Tungsten hardly diffuses from the tungsten film into the i type germanium layer even when a thermal stress is applied, making it possible to prevent the resulting germanium photoreceiver from having diode characteristics deteriorated by the thermal stress.
    Type: Application
    Filed: September 13, 2017
    Publication date: March 22, 2018
    Inventors: Teruhiro KUWAJIMA, Shinichi WATANUKI, Futoshi KOMATSU, Tomoo NAKAYAMA
  • Publication number: 20070215944
    Abstract: The semiconductor device which has the resistor element which was formed in the SOI layer of an SOI substrate and suppressed the influence of leak to the minimum is obtained. N+ diffusion region is selectively formed in an SOI layer, and a full isolation region is formed covering all the peripheral regions of N+ diffusion region. A full isolation region penetrates an SOI layer, and reaches a buried oxide film, and N+ diffusion region is electrically thoroughly insulated from the outside by the full isolation region. N+ diffusion region extends in the longitudinal direction in a drawing, and is formed in lengthwise rectangular shape in plan view. And a silicide film is formed in the front surface at the side of one end of N+ diffusion region, a silicide film is formed in the front surface at the side of the other end, and a metal plug is formed on a silicide film, respectively.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 20, 2007
    Inventor: Futoshi Komatsu