Patents by Inventor Gary B. Tepolt

Gary B. Tepolt has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10453787
    Abstract: An electronic module assembly including a via spanning multiple layers in a wafer based module is described. The electronic module assembly can include a first layer deposited upon a substrate, a second layer deposited on a top surface of the first layer, and the via spanning multiple layers. The via can include a first bottom that is formed on a top surface of the first layer and a first sidewall that upstands from the first bottom and extending at least through the second layer.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: October 22, 2019
    Assignee: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Maurice S. Karpman, Nicole S. Mueller, Gary B. Tepolt, Russell Berman
  • Patent number: 9693469
    Abstract: An electronic module subassembly including a substrate. The substrate includes a bottom laminate, a middle laminate coupled to the bottom laminate, and a top laminate coupled to the middle laminate. The middle laminate has a plurality of web areas, each web area defining at least one hole. The defines a planar top surface and a plurality of open areas corresponding to and aligned with the plurality of web areas. First components have a first thickness. At least one first component is in each of the open areas. Second components have a second thickness relatively larger than the first thickness. At least one second component is in each of the open areas. The second components extend into the respective at least one hole of the web areas. Encapsulant fills in the open areas and the web areas.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: June 27, 2017
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Gary B. Tepolt, John Merullo, Jeffrey C. Thompson, Berj Nercessian
  • Publication number: 20160343652
    Abstract: An electronic module assembly including a via spanning multiple layers in a wafer based module is described. The electronic module assembly can include a first layer deposited upon a substrate, a second layer deposited on a top surface of the first layer, and the via spanning multiple layers. The via can include a first bottom that is formed on a top surface of the first layer and a first sidewall that upstands from the first bottom and extending at least through the second layer.
    Type: Application
    Filed: May 20, 2016
    Publication date: November 24, 2016
    Inventors: Maurice S. Karpman, Nicole S. Mueller, Gary B. Tepolt, Russell Berman
  • Patent number: 9425069
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: August 23, 2016
    Assignee: Charles Stark Draper Laboratory, Inc.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Publication number: 20150181709
    Abstract: An electronic module subassembly including a substrate. The substrate includes a bottom laminate, a middle laminate coupled to the bottom laminate, and a top laminate coupled to the middle laminate. The middle laminate has a plurality of web areas, each web area defining at least one hole. The defines a planar top surface and a plurality of open areas corresponding to and aligned with the plurality of web areas. First components have a first thickness. At least one first component is in each of the open areas. Second components have a second thickness relatively larger than the first thickness. At least one second component is in each of the open areas. The second components extend into the respective at least one hole of the web areas. Encapsulant fills in the open areas and the web areas.
    Type: Application
    Filed: December 19, 2013
    Publication date: June 25, 2015
    Applicant: The Charles Stark Draper Laboratory, Inc.
    Inventors: Gary B. Tepolt, John Merullo, Jeffrey C. Thompson, Berj Nercessian
  • Publication number: 20130329376
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Application
    Filed: August 15, 2013
    Publication date: December 12, 2013
    Applicant: THE CHARLES STARK DRAPER LABORATORY, INC.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Patent number: 8535984
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: September 17, 2013
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Patent number: 8273603
    Abstract: In accordance with a method for forming an interposer, a fill hole is formed in a first side of a substrate and a cavity is formed in a second side. The cavity is in fluidic communication with the fill hole. A plurality of posts is formed in the cavity, and an encapsulant is injected through the fill hole into the cavity to encapsulate the plurality of posts. In accordance with a method of thermal management, an electronic component and a heat sink are disposed on opposing sides of an interposer that includes a plurality of encapsulated posts.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: September 25, 2012
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Publication number: 20120086135
    Abstract: In various embodiments, an electronic module features a first cavity in a first side of a substrate, a fill hole extending from the first cavity, and a second cavity in a second side of the substrate. The second cavity is in fluidic communication with the fill hole, and a die is encapsulated within the second cavity.
    Type: Application
    Filed: October 6, 2011
    Publication date: April 12, 2012
    Inventors: Jeffrey C. Thompson, Livia M. Racz, Gary B. Tepolt, Thomas A. Langdo, Andrew J. Mueller
  • Publication number: 20110309528
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Application
    Filed: August 31, 2011
    Publication date: December 22, 2011
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Patent number: 8017451
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: September 13, 2011
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Patent number: 7981698
    Abstract: Packaging is substantially entirely removed from an integrated circuit die. The method allows the batch processing of several integrated circuit dies, such that packaging is removed from each die approximately simultaneously.
    Type: Grant
    Filed: March 9, 2007
    Date of Patent: July 19, 2011
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Dariusz R. Pryputniewicz, Thomas F. Marinis, Gary B. Tepolt
  • Patent number: 7960247
    Abstract: Microelectronic dies are thinned according to a variety of approaches, which may include bonding the dies to a substrate under vacuum, disposing a film over the dies and the substrate, and/or changing a center of pressure during thinning.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: June 14, 2011
    Assignee: The Charles Stark Draper Laboratory, Inc.
    Inventors: Jeffrey C. Thompson, Gary B. Tepolt, Livia M. Racz
  • Publication number: 20090251879
    Abstract: Microelectronic dies are thinned according to a variety of approaches, which may include bonding the dies to a substrate under vacuum, disposing a film over the dies and the substrate, and/or changing a center of pressure during thinning.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 8, 2009
    Inventors: Jeffrey C. Thompson, Gary B. Tepolt, Livia M. Racz
  • Publication number: 20090250249
    Abstract: Electronic modules and interposers are formed by encapsulating microelectronic dies and/or posts within cavities in a substrate.
    Type: Application
    Filed: March 19, 2009
    Publication date: October 8, 2009
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Publication number: 20090250823
    Abstract: Electronic modules are formed by encapsulating microelectronic dies within cavities in a substrate.
    Type: Application
    Filed: June 30, 2008
    Publication date: October 8, 2009
    Inventors: Livia M. Racz, Gary B. Tepolt, Jeffrey C. Thompson, Thomas A. Langdo, Andrew J. Mueller
  • Publication number: 20080217773
    Abstract: Packaging is substantially entirely removed from an integrated circuit die. The method allows the batch processing of several integrated circuit dies, such that packaging is removed from each die approximately simultaneously.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Applicant: Charles Stark Draper Laboratory, Inc.
    Inventors: Dariusz R. Pryputniewicz, Thomas F. Marinis, Gary B. Tepolt
  • Patent number: 5746565
    Abstract: A robotic wafer handler has first and second arms pivotally connected at a swing point to operate in a plane. Each arm is independently drivable through greater than 360.degree. of rotation in the plane. The wafer handler may also include mechanisms for adjusting the plane of rotation, i.e., for providing lift and tilt.
    Type: Grant
    Filed: January 22, 1996
    Date of Patent: May 5, 1998
    Assignee: Integrated Solutions, Inc.
    Inventor: Gary B. Tepolt
  • Patent number: 5611886
    Abstract: A process chamber configurable for the execution of discrete subprocesses in a substrate coating process such as photolithography. Two vertically staggered rings disposed within the process chamber channel a flow of gas through the chamber and retain fluent chemical within the process environment. A replaceable liner further enables reconfiguration of the chamber. The chamber is used for low-velocity dispensing of fluent process chemical onto the substrate surface with a laminar exhaust gas flow through ventilation passages formed about the rings. The chamber is also used during high-velocity spinning of the substrate for even process chemical distribution in a solvent saturated atmosphere. The ventilation passages enable high exhaust flow through the chamber while minimizing the direct impingement of exhaust air on the substrate.
    Type: Grant
    Filed: September 19, 1995
    Date of Patent: March 18, 1997
    Assignee: Integrated Solutions, Inc.
    Inventors: Stephen A. Bachman, Gary B. Tepolt
  • Patent number: 4850299
    Abstract: In the coating apparatus disclosed herein, a semiconductor wafer is held on a vacuum chuck mounted on the spindle of a bidirectional servo motor. The servo motor is energized by a servo amplifier in response to the amplitude of the control signal provided to the amplifier. Dispensing means are provided for placing coating material on wafer held in the chuck. An oscillator is provided generating a periodic output signal of controllable amplitude and period. A programmable sequencer is operative in a first time period for appying the oscillatory output signal as a control signal to the servo amplifier thereby to angularly oscillate a wafer held in the chuck and for operating the dispensing means to place a predetermined amount of coating material on the wafer. The sequencing means is operative in a later time period for applying a fixed higher amplitude control signal to the servo amplifier thereby to spin the wafer and spread the coating material.
    Type: Grant
    Filed: May 24, 1988
    Date of Patent: July 25, 1989
    Inventors: John G. Merullo, Gary B. Tepolt