Patents by Inventor Gary Kaatz

Gary Kaatz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • NMOS circuit in isolated wells that are connected by a bias stack having pluralirty of diode elements
    Patent number: 6630700
    Abstract: An integrated NMOS circuit including an active stack having a plurality of isolated p-well active devices M1-M3, a bias stack having a plurality of diode-connected isolated p-well bias devices M4-M6, the gate of each of the plurality of diode-connected isolated p-well bias devices coupled to the gate of a corresponding one of the plurality of isolated p-well active devices, the bulk of each of the plurality of diode-connected isolated p-well bias devices coupled directly to the bulk of the corresponding one of the plurality of isolated p-well active devices, and the source of each of the plurality of diode-connected isolated p-well bias devices coupled directly to the bulk of the corresponding diode-connected isolated p-well bias device.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: October 7, 2003
    Assignee: Motorola, Inc.
    Inventor: Gary Kaatz
  • Stacked NMOS device biasing on MOS integrated circuits and methods therefor
    Publication number: 20030067042
    Abstract: An integrated NMOS circuit including an active stack having a plurality of isolated p-well active devices M1-M3, a bias stack having a plurality of diode-connected isolated p-well bias devices M4-M6, the gate of each of the plurality of diode-connected isolated p-well bias devices coupled to the gate of a corresponding one of the plurality of isolated p-well active devices, the bulk of each of the plurality of diode-connected isolated p-well bias devices coupled directly to the bulk of the corresponding one of the plurality of isolated p-well active devices, and the source of each of the plurality of diode-connected isolated p-well bias devices coupled directly to the bulk of the corresponding diode-connected isolated p-well bias device.
    Type: Application
    Filed: October 5, 2001
    Publication date: April 10, 2003
    Inventor: Gary Kaatz