Patents by Inventor Gary R. Burhance

Gary R. Burhance has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7375979
    Abstract: A differential pair (200) is provided by routing a printed circuit board (202) having high density interconnect (HDI) substrate (204) with first and second metal layers (212, 218) such that a first runner (206) forms a zigzag pattern using the two metal layers while a second runner (208) forms a second zigzag pattern on the same two metal layers. The first and second zigzag patterns overlap so as to provide orthogonal signal flow.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: May 20, 2008
    Assignee: Motorola, Inc.
    Inventors: Gary R. Burhance, John C. Barron, Peter J. Bartels
  • Publication number: 20080084678
    Abstract: A printed circuit board and a method for imbedding a battery in the printed circuit board are disclosed. The method includes connecting the battery to a first inner pad and a second inner pad on an inner core layer and forming a first battery contact between a first outer pad and the first inner pad. The method also includes electrically isolating the first battery contact and forming a second battery contact between a second outer pad and the second inner pad.
    Type: Application
    Filed: October 10, 2006
    Publication date: April 10, 2008
    Applicant: MOTOROLA, INC.
    Inventors: Gary R. Burhance, John C. Barron, Jorge L. Garcia, David J. Meyer
  • Patent number: 6928726
    Abstract: A substrate assembly (10) and method of making same has at least one embedded component (25) in a via (24) of a substrate core (22) and includes a first adhesive layer (20) coupled to the substrate core, and a second adhesive layer (26) on at least portions of a top surface of the substrate core and above portions of the embedded component. The substrate assembly can further include a first conductive layer (18) adhered to the bottom surface of the substrate core and a second conductive layer (28) on the second adhesive layer. The substrate assembly can further include an interconnection (36) between a conductive surface of the embedded component and at least one among the first conductive layer and the second conductive layer. The interconnection can be formed through an opening (34) that at least temporarily exposes at least a conductive surface (32) of the embedded component.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: August 16, 2005
    Assignee: Motorola, Inc.
    Inventors: James A. Zollo, John K. Arledge, John C. Barron, Gary R. Burhance, John Holley, Henry F. Liebman