Abstract: A method can be executed by at least one processor of a computer to generate synthetic Integrated Circuit (IC) layout patterns, where the method can optionally include accessing attribute values of the IC layout pattern features generated using IC layout patterns from at least one at least one previous generation semiconductor fabrication technology node.

Abstract: A method can be executed by at least one processor of a computer to generate synthetic Integrated Circuit (IC) layout patterns, where the method can optionally include accessing attribute values of the IC layout pattern features generated using IC layout patterns from at least one at least one previous generation semiconductor fabrication technology node.

Abstract: Illustrative embodiments provide a field-programmable transistor array and a method of making an integrated circuit comprising a field-programmable transistor array. The field-programmable transistor array comprises a plurality of logic cells. Each of the plurality of logic cells comprises a plurality of columns of transistors. Each of the plurality of columns of transistors comprises a plurality of first transistors and a plurality of second transistors. Each of the plurality of first transistors are individually programmable to be either always on, always off, or to be controlled by a logic signal to be on or off. Each of the plurality of second transistors are configured to be programmed to be always on or always off.

Abstract: Illustrative embodiments provide a field-programmable transistor array and a method of making an integrated circuit comprising a field-programmable transistor array. The field-programmable transistor array comprises a plurality of logic cells. Each of the plurality of logic cells comprises a plurality of columns of transistors. Each of the plurality of columns of transistors comprises a plurality of first transistors and a plurality of second transistors. Each of the plurality of first transistors are individually programmable to be either always on, always off, or to be controlled by a logic signal to be on or off. Each of the plurality of second transistors are configured to be programmed to be always on or always off.

Abstract: Illustrative embodiments provide a field-programmable transistor array and a method of making an integrated circuit comprising a field-programmable transistor array. The field-programmable transistor array comprises a plurality of logic cells. Each of the plurality of logic cells comprises a plurality of columns of transistors. Each of the plurality of columns of transistors comprises a plurality of first transistors and a plurality of second transistors. Each of the plurality of first transistors are individually programmable to be either always on, always off, or to be controlled by a logic signal to be on or off. Each of the plurality of second transistors are configured to be programmed to be always on or always off.

Abstract: Illustrative embodiments provide a field-programmable transistor array and a method of making an integrated circuit comprising a field-programmable transistor array. The field-programmable transistor array comprises a plurality of logic cells. Each of the plurality of logic cells comprises a plurality of columns of transistors. Each of the plurality of columns of transistors comprises a plurality of first transistors and a plurality of second transistors. Each of the plurality of first transistors are individually programmable to be either always on, always off, or to be controlled by a logic signal to be on or off. Each of the plurality of second transistors are configured to be programmed to be always on or always off.