Patents by Inventor George P. Lippincott

George P. Lippincott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250102921
    Abstract: Aspects of the disclosed technology relate to techniques for achieving optical proximity correction. Anchor points in a layout design may be designated as more important or less important. Optical proximity correction iterations are performed on each of the plurality of regions to generate a modified layout design by processing the more important anchor points differently than the less important anchor points, such as by different weighting or by dynamically changing the target for the less important anchor points. In this way, the edge placement error may be reduced or eliminated for the more important anchor points.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Applicant: Siemens Industry Software Inc.
    Inventors: George P. Lippincott, Avneet Kaur
  • Publication number: 20240193338
    Abstract: Various aspects of the present disclosed technology relate to techniques for retargeting free-form layout features. In a retargeting process, anchor points are selected on boundary lines of layout features based on one or more predetermined conditions. Property values comprising spacing values and linewidth values for each of the anchor points are then determined. Based on the determined property values, positions of the anchor points are adjusted to derive new anchor points. Retargeted layout features are derived by using splines as interpolating curves passing through the new anchor points or as approximating curves passing near to but not necessarily through the new anchor points.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventors: Vladislav Liubich, Avneet Kaur, George P Lippincott
  • Publication number: 20230408901
    Abstract: Aspects of the disclosed technology relate to techniques for applying optical proximity correction to free form shapes. Each optical proximity correction iteration comprises: computing edge adjustment values for the straight ty correction iteration immediately preceding the each of the plurality of optical proximity correction iterations, adjusting locations of the straight line fragments based on the determined edge adjustment values, determining smooth boundary lines for the layout features based on the straight line fragments on the adjusted locations, performing a simulation process on the layout features having the smooth boundary lines to determine a simulated image of the layout features, and deriving the edge adjustment errors for the straight line fragments based on comparing the simulated image with a target image of the layout features.
    Type: Application
    Filed: October 8, 2020
    Publication date: December 21, 2023
    Inventors: George P. Lippincott, Vladislav Liubich, Kyohei Sakajiri
  • Patent number: 10732499
    Abstract: Aspects of the disclosed technology relate to techniques for achieving optical proximity correction cross-tile consistency. A layout design is divided into a plurality of regions. Optical proximity correction iterations are performed on each of the plurality of regions to generate a modified layout design. Based on the modified layout design and the layout pattern surrounding each of the edge fragments in the modified layout design, a final modified layout design is generated such that the edge fragments in different regions in the plurality of regions in the final modified layout design having the same layout pattern have a same edge adjustment value with respect to the layout design.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: August 4, 2020
    Assignee: Mentor Graphics Corporation
    Inventor: George P. Lippincott
  • Publication number: 20190155143
    Abstract: Aspects of the disclosed technology relate to techniques for achieving optical proximity correction cross-tile consistency. A layout design is divided into a plurality of regions. Optical proximity correction iterations are performed on each of the plurality of regions to generate a modified layout design. Based on the modified layout design and the layout pattern surrounding each of the edge fragments in the modified layout design, a final modified layout design is generated such that the edge fragments in different regions in the plurality of regions in the final modified layout design having the same layout pattern have a same edge adjustment value with respect to the layout design.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 23, 2019
    Inventor: George P. Lippincott
  • Patent number: 9811615
    Abstract: Various aspects of the disclosed technology relate to techniques of retargeting layout features. A process window simulation on a layout design is performed to generate process window information that comprises predicted print positions of layout features computed under various process conditions. Retargeted print positions for a plurality of edge fragments in the layout design are then determined based on minimizing a combined change of targeted print positions for the plurality of edge fragments under constraints represented based on the process window information and specification limits for printed layout features. Based on the retargeted print positions, positions of the plurality of edge fragments are adjusted for optical proximity correction.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: November 7, 2017
    Assignee: Mentor Graphics Corporation
    Inventors: George P. Lippincott, Zhitang Yu, Xima Zhang
  • Publication number: 20170109459
    Abstract: Various aspects of the disclosed technology relate to techniques of retargeting layout features. A process window simulation on a layout design is performed to generate process window information that comprises predicted print positions of layout features computed under various process conditions. Retargeted print positions for a plurality of edge fragments in the layout design are then determined based on minimizing a combined change of targeted print positions for the plurality of edge fragments under constraints represented based on the process window information and specification limits for printed layout features. Based on the retargeted print positions, positions of the plurality of edge fragments are adjusted for optical proximity correction.
    Type: Application
    Filed: October 20, 2015
    Publication date: April 20, 2017
    Inventors: George P. Lippincott, Zhitang Yu, Xima Zhang
  • Patent number: 8881070
    Abstract: Aspects of the invention relate to techniques for applying edge fragment correlation information to optical proximity correction. Conventional edge adjustment values for the edge fragments are first derived from edge placement error values. Neighbor-aware edge adjustment values for the edge fragments are then computed based on the edge placement error values, the conventional edge adjustment values and edge fragment correlation information. The computation comprises: calculating pseudo edge placement error values by subtracting neighboring edge movement contribution values from the edge placement error values and calculating the neighbor-aware edge adjustment values based on the pseudo edge placement error values. The computed neighbor-aware edge adjustment values are combined with conventional edge adjustment values and the edge fragments are adjusted accordingly. The process may be repeated for a number of times.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: November 4, 2014
    Assignee: Mentor Graphics Corporation
    Inventors: George P. Lippincott, Junjiang Lei, Le Hong
  • Patent number: 8806390
    Abstract: An integrated circuit verification system provides an indication of conflicts between an OPC suggested correction and a manufacturing rule. The indication specifies which edge segments are in conflict so that a user may remove the conflict to achieve a better OPC result. In another embodiment of the invention, edge segments are assigned a priority such that the correction of a lower priority edge does not hinder a desired OPC correction of a higher priority edge.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: August 12, 2014
    Assignee: Mentor Graphics Corporation
    Inventor: George P. Lippincott
  • Patent number: 8533637
    Abstract: Aspects of the invention relate to retargeting based on process window simulation to fix hotspots. The process window simulation is performed to generate process window information. Edge fragments are selected for retargeting. Based on the process window information, the selected edge fragments are retargeted in a balanced way.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: September 10, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: Christopher E Reid, George P Lippincott
  • Patent number: 8352891
    Abstract: Layout design data are decomposed for double dipole lithography based on partial intensity distribution information. The partial intensity distribution information is generated by performing optical simulations on the layout design data. The layout decomposition may further be adjusted during an optical proximity correction process. The adjustment may utilize the partial intensity distribution information.
    Type: Grant
    Filed: August 19, 2010
    Date of Patent: January 8, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: Christopher E Reid, George P Lippincott, Sergiy M Komirenko
  • Patent number: 8250495
    Abstract: Method and apparatus for generating a pair of layouts suitable for forming exposure mask to use in a double dipole lithographic process are disclosed. With some implementations, a y-dipole layout and an x-dipole layout are generated by decomposing a target layout. Subsequently, an optical proximity correction process is implemented on the y-dipole layout and the x-dipole layout. The decomposition may designate ones of the edge segments in the target layout at major edge segments and other ones of the edge segments as minor edge segments. A higher feedback value may then be assigned to the minor edges than the major edges. Subsequently, a few iterations of an optical proximity correction process that utilizes a smaller than intended mask rule constraint value and the assigned feedback values is implemented on the target layout. The minor edges separated by a distance of less than the intended mask rule constraint distance are then collapsed.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: August 21, 2012
    Assignee: Mentor Graphics Corporation
    Inventors: George P. Lippincott, Sergly M. Komirenko
  • Patent number: 8185847
    Abstract: A pre-bias optical proximity correction (OPC) method allows faster convergence during OPC iterations, providing an initial set of conditions to edge fragments of a layout based on density conditions near the edge fragments.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: May 22, 2012
    Assignee: Mentor Graphics Corporation
    Inventors: Juan Andres Torres Robles, Andrew Michael Jost, Mark C. Simmons, George P. Lippincott
  • Publication number: 20120047473
    Abstract: Layout design data are decomposed for double dipole lithography based on partial intensity distribution information. The partial intensity distribution information is generated by performing optical simulations on the layout design data. The layout decomposition may further be adjusted during an optical proximity correction process. The adjustment may utilize the partial intensity distribution information.
    Type: Application
    Filed: August 19, 2010
    Publication date: February 23, 2012
    Inventors: CHRISTOPHER E. REID, George P. Lippincott, Sergiy M. Komirenko
  • Publication number: 20110167394
    Abstract: An integrated circuit verification system provides an indication of conflicts between an OPC suggested correction and a manufacturing rule. The indication specifies which edge segments are in conflict so that a user may remove the conflict to achieve a better OPC result. In another embodiment of the invention, edge segments are assigned a priority such that the correction of a lower priority edge does not hinder a desired OPC correction of a higher priority edge.
    Type: Application
    Filed: December 17, 2010
    Publication date: July 7, 2011
    Inventor: George P. Lippincott
  • Publication number: 20110161895
    Abstract: Aspects of the invention relate to retargeting based on process window simulation to fix hotspots. The process window simulation is performed to generate process window information. Edge fragments are selected for retargeting. Based on the process window information, the selected edge fragments are retargeted in a balanced way.
    Type: Application
    Filed: December 29, 2010
    Publication date: June 30, 2011
    Inventors: CHRISTOPHER E. REID, George P. Lippincott
  • Patent number: 7865863
    Abstract: An integrated circuit verification system provides an indication of conflicts between an OPC suggested correction and a manufacturing rule. The indication specifies which edge segments are in conflict so that a user may remove the conflict to achieve a better OPC result. In another embodiment of the invention, edge segments are assigned a priority such that the correction of a lower priority edge does not hinder a desired OPC correction of a higher priority edge.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: January 4, 2011
    Assignee: Mentor Graphics Corporation
    Inventor: George P. Lippincott
  • Publication number: 20100325591
    Abstract: Sub-resolution assist features (SRAFs) are placed in a template form and in series adjacent to main features in a layout design. After each SRAF template is placed, a clean-up process is conducted according to clean-up rules if necessary. Both SRAF templates and clean-up rules may be derived by using a model-based method or an optimization approach. Methods according to various embodiments of the invention may be used to place SRAFs near some two-dimensional main features such as contact features.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 23, 2010
    Inventors: George P. Lippincott, Loran Friedrich
  • Patent number: 7739650
    Abstract: A pre-bias optical proximity correction (OPC) method allows faster convergence during OPC iterations, providing an initial set of conditions to edge fragments of a layout based on density conditions near the edge fragments.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 15, 2010
    Inventors: Juan Andres Torres Robles, Andrew Michael Jost, Mark C. Simmons, George P. Lippincott
  • Publication number: 20090241077
    Abstract: Techniques for performing optical proximity correction on a layout design or portion thereof are provided with various implementations of the invention. With various implementations of the invention, movement and simulation of selected edge fragments is disabled during the optical proximity correction process. The operations of the optical proximity correction process, such as for example simulation and displacement of edge segments, is then performed for the edge fragments that remain enabled. With further implementations of the invention, a simulation site is defined for ones of the edge fragments. The operations of the optical proximity correction process, such as for example simulation and displacement of edge segments, is performed for each simulation site. Additionally, during the optical proximity correction process, the simulations sites may be moved and or removed individually based on various conditions.
    Type: Application
    Filed: January 14, 2009
    Publication date: September 24, 2009
    Inventors: George P. Lippincott, Christopher E. Reid