Patents by Inventor Gerard Arie de Wit

Gerard Arie de Wit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120956
    Abstract: A transmitter circuit including an impedance setting circuit having first and second legs, wherein each leg includes an adjustable pull-up resistance and an adjustable pull-down resistance connected in series between a supply terminal and a reference terminal. A first-leg-node, between the adjustable resistances of the first leg, is connected to a first bus terminal. A second-leg-node, between the adjustable resistances of the second leg, is connected to a second bus terminal. The controller detects a transition in a transmission data signal, and in response to a dominant to recessive transition the controller controls a voltage setting circuit to set the differential driver voltage on the bus to a recessive value; adjusts each of the adjustable pull-up resistances and the adjustable pull-down resistances with the same target impedance profile such that the transmitter circuit drives the bus with a target driver impedance for an active recessive period of a bit time.
    Type: Application
    Filed: September 7, 2023
    Publication date: April 11, 2024
    Inventors: Johannes Petrus Antonius Frambach, Cornelis Klaas Waardenburg, Stefan Paul van den Hoek, Gerard Arie de Wit
  • Patent number: 11843388
    Abstract: A Controller Area Network (CAN) transmitter, in which transitions between output levels are smoothed through use of multiple Digital to Analog Converters (DACs) switched by a multi-phase clock signal. Example embodiments include a CAN transmitter (100) comprising: an oscillator (101) configured to generate a clock signal having n equally spaced phases (clk_0, clk_120, clk_240), where n is an integer greater than 1; n Digital to Analog Converters, DACs (1021-3), each DAC having an input connected to one of the n phases of the clock signal and to a common data input line, each DAC being configured to provide an output signal that transitions between first and second output levels in M discrete steps upon being triggered by a transition of a signal on the data input line synchronized with the one of the n phases of the clock signal; and an output amplifier stage (103) configured to provide a differential CAN output signal from a combination of output signals from each of the n DACs (1021-3).
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: December 12, 2023
    Assignee: NXP B.V.
    Inventors: Johannes Petrus Antonius Frambach, Cornelis Klaas Waardenburg, Gerard Arie de Wit
  • Publication number: 20220247416
    Abstract: The disclosure relates to a Controller Area Network (CAN) transmitter, in which transitions between output levels are smoothed through use of multiple Digital to Analog Converters (DACs) switched by a multi-phase clock signal.
    Type: Application
    Filed: January 12, 2022
    Publication date: August 4, 2022
    Inventors: Johannes Petrus Antonius Frambach, Cornelis Klaas Waardenburg, Gerard Arie de Wit